> >> >> ============= >> spi: xilinx - minimize iomem reads >> >> If this IP core is accessed through bridges like PCI-e, reads are rather >> costly. Doing many reads or read-modify-writes is thus long and strenuous >> on the CPU (active waiting). >> >> The transfer workflow of this driver allows some assumptions to be made >> and >> exploited to minimize reads as much as possible. >> >> These two assumptions are made: >> - since we are in control of the CR register, cache it so we don't have >> to >> read it all the time to modify it. > > Makes sense.
I have made an attempt at it can you check if you get any performance improvemets on your setup. http://www.spinics.net/lists/linux-spi/msg05963.html Thanks, Shubhrajyoti -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
