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I am confused about the following point regarding Virtual Indexed Tag Indexed Cache and i would appreciate any help I have read in this article http://www.linuxjournal.com/article/7105 , the following: << In virtually indexed, virtually tagged (VIVT) caches...suffer from several other problems: 1- Virtual address translations usually are changed as part of normal kernel operation, so the cache must pay careful attention to changes in TLB entries (and changes in address space) and flush cache lines whose translations have changed. 2- Even in a single address space, multiple virtual addresses may exist for the same physical address. Each of these virtual addresses would be cached separately, even though they represent the same data. This is called the cache-line aliasing problem. >> I am just confused about the author: 1- first point, why the cache has to be bothered by the change in the address logical-physical mapping since it is a virtual cache?? 2- could you please give me a situation where two virtual addresses from the same process are mapped to the same physical address? i can't see this happening since each process page is allocated a dedicated frame. sorry if my questions seem obvious thank you for your help ____________________________________________________________________________________ Any questions? Get answers on any topic at www.Answers.yahoo.com. Try it now. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
