James Bottomley <[EMAIL PROTECTED]> wrote: > That we'd have to put a conditional jump in there is an incorrect > assumption on risc machines.
I didn't say we would *have* to put a conditional jump in there. But I don't know that I it can be avoided on all archs. I don't know that sparc32 can do conditional instructions for example. If we force this assumption it becomes a potential limitation on the archs we can support. OTOH, it may be that every arch that supports SMP and has to emulate bitops with spinlocks also supports conditional stores; but I don't know that. David - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
