Hi Alan,
This patch against 2.2.18pre15 replaces the hardcoded 32 byte cache line
alignment for the .data.cacheline_aligned section with a dynamic one
depending on asm/cache.h [so that K7-SMP will hopefully be handled gratefully]
Please apply,
-Andi
--- linux-work/arch/i386/Makefile-BOOTFIX Thu May 4 02:16:30 2000
+++ linux-work/arch/i386/Makefile Sun Oct 22 10:39:15 2000
@@ -25,22 +25,27 @@
ifdef CONFIG_M386
CFLAGS := $(CFLAGS) -m386 -DCPU=386
+CPU := 386
endif
ifdef CONFIG_M486
CFLAGS := $(CFLAGS) -m486 -DCPU=486
+CPU := 486
endif
ifdef CONFIG_M586
CFLAGS := $(CFLAGS) -m486 -malign-loops=2 -malign-jumps=2 -malign-functions=2
-DCPU=586
+CPU := 586
endif
ifdef CONFIG_M586TSC
CFLAGS := $(CFLAGS) -m486 -malign-loops=2 -malign-jumps=2 -malign-functions=2
-DCPU=586
+CPU := 586
endif
ifdef CONFIG_M686
CFLAGS := $(CFLAGS) -m486 -malign-loops=2 -malign-jumps=2 -malign-functions=2
-DCPU=686
+CPU := 686
endif
HEAD := arch/i386/kernel/head.o arch/i386/kernel/init_task.o
@@ -65,7 +70,7 @@
vmlinux: arch/i386/vmlinux.lds
arch/i386/vmlinux.lds: arch/i386/vmlinux.lds.S FORCE
- $(CPP) -C -P -I$(HPATH) -imacros $(HPATH)/asm-i386/page_offset.h -Ui386
arch/i386/vmlinux.lds.S >arch/i386/vmlinux.lds
+ $(CPP) -DCPU=${CPU} -C -P -I$(HPATH) -imacros $(HPATH)/asm-i386/page_offset.h
+-Ui386 arch/i386/vmlinux.lds.S >arch/i386/vmlinux.lds
FORCE: ;
--- linux/arch/i386/vmlinux.lds.S Fri Oct 20 06:19:26 2000
+++ linux-work/arch/i386/vmlinux.lds.S Sun Oct 22 10:47:16 2000
@@ -1,6 +1,7 @@
/* ld script to make i386 Linux kernel
* Written by Martin Mares <[EMAIL PROTECTED]>;
*/
+#include <asm/cache.h>
OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
OUTPUT_ARCH(i386)
ENTRY(_start)
@@ -53,7 +54,7 @@
__init_end = .;
- . = ALIGN(32);
+ . = ALIGN(L1_CACHE_BYTES);
.data.cacheline_aligned : { *(.data.cacheline_aligned) }
. = ALIGN(4096);
-
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