On Wed, 2007-12-19 at 10:34 +0200, Aviv Greenberg wrote:
> Can you send an output of cat /proc/interrupts ? Is there any device
> sharing the IRQ line with the network interface?
On Tue, 2007-12-18 at 22:14 +0200, Oron Peled wrote:
> 6. Why guess?
> watch -n10 -d cat /proc/interrupts
/proc/interrupts looks like this:
CPU0 CPU1 CPU2 CPU3
0: 2818676796 3045096095 2597715597 3039460137 IO-APIC-edge timer
1: 0 2 0 0 IO-APIC-edge i8042
9: 0 0 0 0 IO-APIC-fasteoi acpi
12: 0 1 1 2 IO-APIC-edge i8042
14: 6144547 86113 5937042 85048 IO-APIC-edge libata
15: 0 0 0 0 IO-APIC-edge libata
16: 1 0 0 1 IO-APIC-fasteoi
uhci_hcd:usb1, ehci_hcd:usb6
17: 234 13 197 11 IO-APIC-fasteoi
uhci_hcd:usb2
18: 0 0 0 0 IO-APIC-fasteoi
uhci_hcd:usb3
19: 0 0 0 0 IO-APIC-fasteoi
uhci_hcd:usb4
22: 24 24 25 23 IO-APIC-fasteoi
uhci_hcd:usb5
2289: 426764360 12 153890890 25567190 PCI-MSI-edge eth1
2290: 184062475 14352363 1146094937 36605794 PCI-MSI-edge eth0
2292: 253368176 26799612 221976501 20082294 PCI-MSI-edge cciss0
NMI: 0 0 0 0
LOC: 2910906978 2910907454 2910906845 2910907935
I haven't calculated diffs exactly yet, but on first glance it looks
like eth0 interrupts are happening at about 150 a second while cciss0
interrupts are happening at about 20 per second. Also eth0 interrupts
happen almost exclusively on one CPI (currently 2 at the moment) and
cciss happen on two CPUs (0 and 2). I'm not sure what's up with CPU1 and
3 - is it possible that because these are the "2nd cores" on each chip
that they don't get as many interrupts ? isn't 'irqbalance' supposed to
do something about it ?
--
Oded
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