On Tue, May 27, 2025 at 08:59:03AM -0700, Shradha Gupta wrote:
> Currently, the MANA driver allocates MSI-X vectors statically based on
> MANA_MAX_NUM_QUEUES and num_online_cpus() values and in some cases ends
> up allocating more vectors than it needs. This is because, by this time
> we do not have a HW channel and do not know how many IRQs should be
> allocated.
> 
> To avoid this, we allocate 1 MSI-X vector during the creation of HWC and
> after getting the value supported by hardware, dynamically add the
> remaining MSI-X vectors.
> 
> Signed-off-by: Shradha Gupta <shradhagu...@linux.microsoft.com>
> Reviewed-by: Haiyang Zhang <haiya...@microsoft.com>
> ---
>  Changes in v4:
>  * added BUG_ON at appropriate places
>  * moved xa_destroy to mana_gd_remove()
>  * rearragned the cleanup logic in mana_gd_setup_dyn_irqs()
>  * simplified processing around start_irq_index in mana_gd_setup_irqs()
>  * return 0 instead of return err as appropriate
> ---
>  Changes in v3:
>  * implemented irq_contexts as xarrays rather than list
>  * split the patch to create a perparation patch around irq_setup()
>  * add log when IRQ allocation/setup for remaining IRQs fails
> ---
>  Changes in v2:
>  * Use string 'MSI-X vectors' instead of 'pci vectors'
>  * make skip-cpu a bool instead of int
>  * rearrange the comment arout skip_cpu variable appropriately
>  * update the capability bit for driver indicating dynamic IRQ allocation
>  * enforced max line length to 80
>  * enforced RCT convention
>  * initialized gic to NULL, for when there is a possibility of gic
>    not being populated correctly
> ---
>  .../net/ethernet/microsoft/mana/gdma_main.c   | 306 +++++++++++++-----
>  include/net/mana/gdma.h                       |   8 +-
>  2 files changed, 235 insertions(+), 79 deletions(-)
> 
> diff --git a/drivers/net/ethernet/microsoft/mana/gdma_main.c 
> b/drivers/net/ethernet/microsoft/mana/gdma_main.c
> index 763a548c4a2b..98ebecbec9a7 100644
> --- a/drivers/net/ethernet/microsoft/mana/gdma_main.c
> +++ b/drivers/net/ethernet/microsoft/mana/gdma_main.c
> @@ -6,6 +6,8 @@
>  #include <linux/pci.h>
>  #include <linux/utsname.h>
>  #include <linux/version.h>
> +#include <linux/msi.h>
> +#include <linux/irqdomain.h>
>  
>  #include <net/mana/mana.h>
>  
> @@ -80,8 +82,15 @@ static int mana_gd_query_max_resources(struct pci_dev 
> *pdev)
>               return err ? err : -EPROTO;
>       }
>  
> -     if (gc->num_msix_usable > resp.max_msix)
> -             gc->num_msix_usable = resp.max_msix;
> +     if (!pci_msix_can_alloc_dyn(pdev)) {
> +             if (gc->num_msix_usable > resp.max_msix)
> +                     gc->num_msix_usable = resp.max_msix;
> +     } else {
> +             /* If dynamic allocation is enabled we have already allocated
> +              * hwc msi
> +              */
> +             gc->num_msix_usable = min(resp.max_msix, num_online_cpus() + 1);
> +     }
>  
>       if (gc->num_msix_usable <= 1)
>               return -ENOSPC;
> @@ -482,7 +491,9 @@ static int mana_gd_register_irq(struct gdma_queue *queue,
>       }
>  
>       queue->eq.msix_index = msi_index;
> -     gic = &gc->irq_contexts[msi_index];
> +     gic = xa_load(&gc->irq_contexts, msi_index);
> +     if (WARN_ON(!gic))
> +             return -EINVAL;
>  
>       spin_lock_irqsave(&gic->lock, flags);
>       list_add_rcu(&queue->entry, &gic->eq_list);
> @@ -507,7 +518,10 @@ static void mana_gd_deregiser_irq(struct gdma_queue 
> *queue)
>       if (WARN_ON(msix_index >= gc->num_msix_usable))
>               return;
>  
> -     gic = &gc->irq_contexts[msix_index];
> +     gic = xa_load(&gc->irq_contexts, msix_index);
> +     if (WARN_ON(!gic))
> +             return;
> +
>       spin_lock_irqsave(&gic->lock, flags);
>       list_for_each_entry_rcu(eq, &gic->eq_list, entry) {
>               if (queue == eq) {
> @@ -1366,47 +1380,113 @@ static int irq_setup(unsigned int *irqs, unsigned 
> int len, int node,
>       return 0;
>  }
>  
> -static int mana_gd_setup_irqs(struct pci_dev *pdev)
> +static int mana_gd_setup_dyn_irqs(struct pci_dev *pdev, int nvec)
>  {
>       struct gdma_context *gc = pci_get_drvdata(pdev);
> -     unsigned int max_queues_per_port;
>       struct gdma_irq_context *gic;
> -     unsigned int max_irqs, cpu;
> -     int start_irq_index = 1;
> -     int nvec, *irqs, irq;
> -     int err, i = 0, j;
> +     bool skip_first_cpu = false;
> +     int *irqs, irq, err, i;
>  
>       cpus_read_lock();

Now that num_online_cpus is moved further down in this new logic,
do we want to reduce the critical section ?

I don't think we want kmalloc_array to be protected.


> -     max_queues_per_port = num_online_cpus();
> -     if (max_queues_per_port > MANA_MAX_NUM_QUEUES)
> -             max_queues_per_port = MANA_MAX_NUM_QUEUES;
>  
> -     /* Need 1 interrupt for the Hardware communication Channel (HWC) */
> -     max_irqs = max_queues_per_port + 1;
> -
> -     nvec = pci_alloc_irq_vectors(pdev, 2, max_irqs, PCI_IRQ_MSIX);
> -     if (nvec < 0) {
> -             cpus_read_unlock();
> -             return nvec;
> -     }
> -     if (nvec <= num_online_cpus())
> -             start_irq_index = 0;
> -
> -     irqs = kmalloc_array((nvec - start_irq_index), sizeof(int), GFP_KERNEL);
> +     irqs = kmalloc_array(nvec, sizeof(int), GFP_KERNEL);
>       if (!irqs) {
>               err = -ENOMEM;
>               goto free_irq_vector;
>       }
>  
> -     gc->irq_contexts = kcalloc(nvec, sizeof(struct gdma_irq_context),
> -                                GFP_KERNEL);
> -     if (!gc->irq_contexts) {
> +     /*
> +      * While processing the next pci irq vector, we start with index 1,
> +      * as IRQ vector at index 0 is already processed for HWC.
> +      * However, the population of irqs array starts with index 0, to be
> +      * further used in irq_setup()
> +      */
> +     for (i = 1; i <= nvec; i++) {
> +             gic = kzalloc(sizeof(*gic), GFP_KERNEL);
> +             if (!gic) {
> +                     err = -ENOMEM;
> +                     goto free_irq;
> +             }
> +             gic->handler = mana_gd_process_eq_events;
> +             INIT_LIST_HEAD(&gic->eq_list);
> +             spin_lock_init(&gic->lock);
> +
> +             snprintf(gic->name, MANA_IRQ_NAME_SZ, "mana_q%d@pci:%s",
> +                      i - 1, pci_name(pdev));
> +
> +             /* one pci vector is already allocated for HWC */
> +             irqs[i - 1] = pci_irq_vector(pdev, i);
> +             if (irqs[i - 1] < 0) {
> +                     err = irqs[i - 1];
> +                     goto free_current_gic;
> +             }
> +
> +             err = request_irq(irqs[i - 1], mana_gd_intr, 0, gic->name, gic);
> +             if (err)
> +                     goto free_current_gic;
> +
> +             xa_store(&gc->irq_contexts, i, gic, GFP_KERNEL);
> +     }
> +
> +     /*
> +      * When calling irq_setup() for dynamically added IRQs, if number of
> +      * CPUs is more than or equal to allocated MSI-X, we need to skip the
> +      * first CPU sibling group since they are already affinitized to HWC IRQ
> +      */
> +     if (gc->num_msix_usable <= num_online_cpus())
> +             skip_first_cpu = true;
> +
> +     err = irq_setup(irqs, nvec, gc->numa_node, skip_first_cpu);
> +     if (err)
> +             goto free_irq;
> +
> +     cpus_read_unlock();
> +     kfree(irqs);
> +     return 0;
> +
> +free_current_gic:
> +     kfree(gic);
> +free_irq:
> +     for (i -= 1; i > 0; i--) {
> +             irq = pci_irq_vector(pdev, i);
> +             gic = xa_load(&gc->irq_contexts, i);
> +             if (WARN_ON(!gic))
> +                     continue;
> +
> +             irq_update_affinity_hint(irq, NULL);
> +             free_irq(irq, gic);
> +             xa_erase(&gc->irq_contexts, i);
> +             kfree(gic);
> +     }
> +     kfree(irqs);
> +free_irq_vector:
> +     cpus_read_unlock();
> +     return err;
> +}
> +
> +static int mana_gd_setup_irqs(struct pci_dev *pdev, int nvec)
> +{
> +     struct gdma_context *gc = pci_get_drvdata(pdev);
> +     struct gdma_irq_context *gic;
> +     int *irqs, *start_irqs, irq;
> +     unsigned int cpu;
> +     int err, i;
> +
> +     cpus_read_lock();

Same here

> +     irqs = kmalloc_array(nvec, sizeof(int), GFP_KERNEL);
> +     if (!irqs) {
>               err = -ENOMEM;
> -             goto free_irq_array;
> +             goto free_irq_vector;
>       }
>  
>       for (i = 0; i < nvec; i++) {
> -             gic = &gc->irq_contexts[i];
> +             gic = kzalloc(sizeof(*gic), GFP_KERNEL);
> +             if (!gic) {
> +                     err = -ENOMEM;
> +                     goto free_irq;
> +             }
> +
>               gic->handler = mana_gd_process_eq_events;
>               INIT_LIST_HEAD(&gic->eq_list);
>               spin_lock_init(&gic->lock);

<snip>

- Saurabh

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