From: Thor Thayer <ttha...@opensource.altera.com>
Add the device tree bindings needed to support the Altera On-Chip
RAM ECC on the Arria10 chip.
Signed-off-by: Thor Thayer <ttha...@opensource.altera.com>
---
.../bindings/arm/altera/socfpga-eccmgr.txt | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
index 37ff9bf..2f409d5 100644
--- a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
+++ b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
@@ -71,6 +71,11 @@ Required Properties:
- compatible : Should be "altr,socfpga-a10-l2-ecc"
- reg : Address and size for ECC error interrupt clear registers.
+On-Chip RAM ECC
+Required Properties:
+- compatible : Should be "altr,socfpga-a10-ocram-ecc"
+- reg : Address and size for ECC block registers.
+
Example:
eccmgr: eccmgr@ffd06000 {
@@ -86,4 +91,9 @@ Example:
compatible = "altr,socfpga-a10-l2-ecc";
reg = <0xffd06010 0x4>;
};
+
+ ocram-ecc@ff8c3000 {
+ compatible = "altr,socfpga-a10-ocram-ecc";
+ reg = <0xff8c3000 0x90>;
+ };
};
--
1.7.9.5
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