On 04/08/2014 01:07 PM, Amit Kucheria wrote:
Hi Daniel,
Have you noticed this on any platform yet with this test?
I have noticed a very very rare hang on the exynos4 board with this test
and the dual cpu support but it is not reproducible enough to check if
the cache flush fixes it or not (or it is related to the cpuidle
driver). I had a long discussion yesterday with Lorenzo who explained me
what could happen without flushing the cache and exiting the SMP mode.
AFAICT,
* The tc2 flushes its cache.
* exynos5 still need to disable cpu1 to enter the AFTR state (which is
broken today), so cache is flushed in the hotplug code path. I hope I
can spot the issue with a quad core.
* omap4 flushes its cache.
* omap3 is not concerned by this because it is an UP system.
* vinci, s3c64, imx5, imx6, ux500, kirkwood does not support cpu power down.
* calxeda hides that through the firmware I believe
* I don't know for tegra but I assume they are flushing and disabling
the cache
I hope with this test we can spot the issue, if any, with multiple runs
on the boards, especially when new drivers will be implemented.
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