On Thu, Mar 14, 2013 at 03:15:11AM +0100, Bill Huang wrote: > I don't think deferring will work either, considering the usage of DVFS, > device voltage is tightly coupled with frequency, when clock rate is > about to increase, we have to boost voltage first and we can lower the > voltage after the clock rate has decreased. All the above sequence have > to be guaranteed or you might crash, so deferring not only make thing > complicated in controlling the order but also hurt performance.
But we could use notifiers in clk_prepare/clk_unprepare to set the voltage no? As clk_prepare/clk_unprepare have to be called before clk_enable or after clk_disable, the voltage can be raised to a safe level, before the clock becomes active. Cheers, Peter. _______________________________________________ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
