> 
> It is similar with Tegra3.
> 

In our case CPU0 has different latencies for 1 C state compared to the other
CPUs

> I think Peter and Lorenzo already wrote a driver based on this approach.
> Peter, Lorenzo any comments ?
> 

Yes. My implementation doesn't provide a state table in the cpuidle device 
at all. I always use cpuidle_register_states() to register the state tables.

Cheers,

Peter.

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