On 27 November 2011 21:30, Siarhei Siamashka <siarhei.siamas...@gmail.com> wrote: > On Sun, Nov 27, 2011 at 8:18 PM, Woodruff, Richard <r-woodru...@ti.com> wrote: >> >>> From: linaro-dev-boun...@lists.linaro.org [mailto:linaro-dev- >>> boun...@lists.linaro.org] On Behalf Of Mans Rullgard >> >>> >> Do you have an erratum number for this? >>> >> >>> > This was very recent BUG and not yet made it to the public errata >>> > numbers. Most likely next PL310 errata update should have >>> > this one documented. >>> >>> Do you have _any_ identifier for it? >> >> ARM expanded errata 752271 to cover DLF not working till r3p2 in errata >> version 13.1 (21 Nov 11), 4460 is r3p1-50rel0 and is impacted. > > Thanks a lot. Your posts are very informative as usual. > > By the way, do you know whether it is safe to use "SCU Speculative > linefills" with Cortex-A9 r2pX and PL310 r3pX? > http://infocenter.arm.com/help/topic/com.arm.doc.ddi0407f/BABEBFBH.html > > As a quick and dirty test, it can be enabled in > 'arch/arm/kernel/smp_scu.c' by just setting extra (1 << 3) bit in SCU > Control Register from 'scu_enable' function.
The SCU is already enabled when that function runs (don't know what enables it), so you'll need to remove the early return to make any changes. I'm not aware of any errata affecting this feature on 4460, nor have I seen any bad behaviour while running with it enabled, and I do get a slight performance increase in Libav benchmarks. -- Mans Rullgard / mru _______________________________________________ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
