Modify the CPU sched_domain flags in powersave mode for using the cpu0 in
ched_mc powersave mode
Signed-off-by: Vincent Guittot <vincent.guit...@linaro.org>
---
arch/arm/include/asm/topology.h | 33 +++++++++++++++++++++++++++++++++
arch/arm/kernel/topology.c | 11 +++++++++++
2 files changed, 44 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/topology.h b/arch/arm/include/asm/topology.h
index 58b8b84..f7f02e3 100644
--- a/arch/arm/include/asm/topology.h
+++ b/arch/arm/include/asm/topology.h
@@ -34,6 +34,39 @@ static inline void store_cpu_topology(unsigned int cpuid) { }
#endif
+/* Common values for CPUs */
+#ifndef SD_CPU_INIT
+#define SD_CPU_INIT (struct sched_domain) { \
+ .min_interval = 1, \
+ .max_interval = 4, \
+ .busy_factor = 64, \
+ .imbalance_pct = 125, \
+ .cache_nice_tries = 1, \
+ .busy_idx = 2, \
+ .idle_idx = 1, \
+ .newidle_idx = 0, \
+ .wake_idx = 0, \
+ .forkexec_idx = 0, \
+ \
+ .flags = 1*SD_LOAD_BALANCE \
+ | 1*SD_BALANCE_NEWIDLE \
+ | 1*SD_BALANCE_EXEC \
+ | 1*SD_BALANCE_FORK \
+ | 0*SD_BALANCE_WAKE \
+ | 1*SD_WAKE_AFFINE \
+ | 0*SD_PREFER_LOCAL \
+ | 0*SD_SHARE_CPUPOWER \
+ | 0*SD_SHARE_PKG_RESOURCES \
+ | 0*SD_SERIALIZE \
+ | arch_sd_sibling_asym_packing() \
+ | sd_balance_for_package_power() \
+ | sd_power_saving_flags() \
+ , \
+ .last_balance = jiffies, \
+ .balance_interval = 1, \
+}
+#endif
+
#include <asm-generic/topology.h>
#endif /* _ASM_ARM_TOPOLOGY_H */
diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
index a1b1f7f..945b980 100644
--- a/arch/arm/kernel/topology.c
+++ b/arch/arm/kernel/topology.c
@@ -227,6 +227,17 @@ unsigned long arch_scale_freq_power(struct sched_domain
*sd, int cpu)
}
/*
+ * sched_domain flag configuration
+ */
+/* TODO add a config flag for this function */
+int arch_sd_sibling_asym_packing(void)
+{
+ if (sched_smt_power_savings || sched_mc_power_savings)
+ return SD_ASYM_PACKING;
+ return 0;
+}
+
+/*
* default topology function
*/
--
1.7.4.1
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