-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1
Hi all,
I'm installing a LFS ona VIA Epia platform (next step: kernel ;-)),
that has neither an Intel nor AMD processor (VIA C3 Nehemiah aka c3-2).
And after applying the coreutils-5.2.1-uname-2.patch, uname -p returned
"i686", which is better than "unknown", but I still didn't found good
enough.
So I used the patched version of coreutils and added detection for VIA
(CentaurHauls) C3 and C3-2 processors. And on the process, I also added
the detection for pentium-m (centrino) processors, that was also "missing".
I've tested it on my VIA and on a centrino notebook, and seems to work
OK. I haven't changed anything else, just added values to previously
undefined models, so in theory I shouldn't have broken anything. But we
all know how theory and praxis differ...
Anyway, I have attached the new patch (It contains
coreutils-5.2.1-uname-2.patch) in case anyone might find
interesting/nice (or even worthy to be included on some LFS release;
that would be quite gratifying ;-)).
Keep up the good work!
Guillem
- --
Guillem Pagès Gassull
Abt. Neuroinformatik
Fakultät für Informatik
D-89069 Universität Ulm
Germany
email:[EMAIL PROTECTED]
tel:+49 731 50 24245
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.2.1 (MingW32)
iD8DBQFDae2JqdOjpSDdifMRAtj6AJ4vW3kmItmmmV/GTl5gq6zAvp0I2wCfUkuV
YfJ+SNycoW47tDTCUszGo9k=
=aXpP
-----END PGP SIGNATURE-----
--- coreutils-5.2.1/src/uname.c 2004-01-21 23:27:02.000000000 +0100
+++ coreutils-5.2.1-patched/src/uname.c 2005-11-02 15:56:08.000000000 +0100
@@ -29,6 +29,12 @@
# include <sys/systeminfo.h>
#endif
+#ifdef linux
+#define cpuid(in,a,b,c,d)\
+ asm("cpuid": "=a" (a), "=b" (b), "=c" (c), "=d" (d) : "a" (in));
+int has_sse( void );
+#endif
+
#if HAVE_SYSCTL && HAVE_SYS_SYSCTL_H
# include <sys/param.h> /* needed for OpenBSD 3.0 */
# include <sys/sysctl.h>
@@ -249,6 +255,115 @@
if (0 <= sysinfo (SI_ARCHITECTURE, processor, sizeof processor))
element = processor;
}
+#else
+ {
+ struct utsname u;
+ uname (&u);
+ element = u.machine;
+#ifdef linux
+/******************************************************************************
+ *
+ * Hello, major hack. I shouldn't have to do this. struct utsname should
+ * have another element with this info in it. There's probably a struct
+ * somewhere that has this info, I just don't know where it is.
+ *
+ *****************************************************************************/
+
+ if( !strcmp( element, "i586" ) || !strcmp( element, "i686" ) ) {
+ int eax, ebx, ecx, edx, unused;
+ int model, family, sse;
+
+ cpuid(0,unused,ebx,ecx,edx);
+ cpuid(1,eax,unused,unused,unused);
+ model = (eax >> 4) & 0xf;
+ family = (eax >> 8) & 0xf;
+
+ switch(ebx) {
+ case 0x756e6547: // Intel
+ switch( family ) {
+ case 5: // Pentium
+ if( model <= 3 )
+ element="pentium";
+ if( model > 3 )
+ element="pentium-mmx";
+ break;
+ case 6: // PentiumPro - Pentium III
+ if( model == 1 ) // Pentium Pro
+ element="pentiumpro";
+ if( ( model == 3 ) || ( model == 5 ) ||
+ ( model == 6 ) ) // Pentium II
+ element="pentium2";
+ if( ( model == 7 ) || ( model == 8 ) ||
+ ( model == 10 ) || ( model == 11 ) ) // These are all Pentium
III
+ element="pentium3";
+ if( ( model == 9) || ( model == 12 ) ||
+ ( model == 13 ) ) // Pentium-M
+ element="pentium-m";
+ break;
+ case 15: // Pentium4
+ element="pentium4";
+ break;
+ default:
+ break;
+ } // end switch( family )
+ break;
+ case 0x68747541: // AMD
+ switch(family) {
+ case 5:
+ if( ( model == 0 ) || ( model == 1 ) ||
+ ( model == 2 ) || ( model == 3 ) ) // K5
+ element="i586";
+ if( ( model == 6 ) || ( model == 7 ) ) // K6
+ element="k6";
+ if( model == 8 ) // K6-2
+ element="k6-2";
+ if( model == 9 ) // K6-3
+ element="k6-3";
+ break;
+ case 6:
+ if( model <= 4 )
+ element="athlon";
+ if( model > 4 ) {
+ sse = has_sse();
+ if( sse == 0 )
+ element="athlon";
+ if( sse == 1 )
+ element="athlon-4";
+ }
+ break;
+ case 15:
+ element="athlon-4";
+ break;
+ default:
+ break;
+ } // end switch( family )
+ break;
+ case 0x69727943: // Cyrix
+ element="i386"; // who knows what cyrix supports, lets be safe
+ break;
+ case 0x746e6543: // Centaur / VIA
+ switch( family ) {
+ case 5: // Centaur
+ // need more info on what is supported
+ element="i386"; // be safe
+ break;
+ case 6: // VIA
+ if( model == 7 ) // VIA Samuel / Ezra; need testing
+ element="c3";
+ if( model == 9 ) // VIA Nehemiah; might need to check stepping
+ element="c3-2";
+ break;
+ default:
+ break;
+ }// end switch( family )
+ break;
+ default:
+ break;
+ } // end switch(ebx)
+ }
+
+#endif
+ }
#endif
#ifdef UNAME_PROCESSOR
if (element == unknown)
@@ -265,7 +380,7 @@
if (toprint & PRINT_HARDWARE_PLATFORM)
{
- char const *element = unknown;
+ char *element = unknown;
#if HAVE_SYSINFO && defined SI_PLATFORM
{
static char hardware_platform[257];
@@ -273,6 +388,15 @@
hardware_platform, sizeof hardware_platform))
element = hardware_platform;
}
+#else
+ {
+ struct utsname u;
+ uname (&u);
+ element = u.machine;
+ if (strlen (element) == 4 && element[0] == 'i' && element[2] == '8'
+ && element[3] == '6')
+ element[1] = '3';
+ }
#endif
#ifdef UNAME_HARDWARE_PLATFORM
if (element == unknown)
@@ -294,3 +418,29 @@
exit (EXIT_SUCCESS);
}
+
+#ifdef linux
+
+/******************************************************************************
+ *
+ * int has_sse( void )
+ * Checks Athlon CPU's to see if they support SSE.
+ *
+ *****************************************************************************/
+
+int has_sse( void )
+{
+ unsigned long edx, unused;
+ int sse;
+ cpuid(1,unused,unused,unused,edx);
+ // I think, I need this tested on a Duron with SSE
+ // and one without it.
+ sse = edx & 0x2000000;
+ if( sse == 0 ) {
+ return 0;
+ } else {
+ return 1;
+ }
+
+}
+#endif
--
http://linuxfromscratch.org/mailman/listinfo/lfs-dev
FAQ: http://www.linuxfromscratch.org/faq/
Unsubscribe: See the above information page
