Hi Hauke,

I am glad to see you are testig "NanoPi Neo Plus2" support in OpenWRT.
Here is a patch instead of b7a1aa4df2a983, with Gigabit Ethernet support.

https://git.openwrt.org/?p=openwrt/staging/hauke.git;a=blob;f=target/linux/sunxi/patches-4.14/061-arm-dts-sun50i-support-for-nanopi-neo-plus2-board.patch;h=535c8b6d1f816480eb2938f54e520f7b4311b970;hb=b7a1aa4df2a9834bb7339712670abbe1a05dc01c

do not have emac node.

regards,
-antony

On Fri, Dec 29, 2017 at 01:53:46PM +0100, Hauke Mehrtens wrote:
> Hi antony,
> 
> On 12/28/2017 06:21 PM, Antony Antony wrote:
> > Hi Hauke,
> > 
> > This will add initial LEDE support for a new board, NanoPi NEO Plus2 board.
> > 
> > LEDE menu options, u-boot, and kernel DT files. The patches are against 
> > hauke/kernel-4.14-sunxi branch.
> 
> Ok this is my development branch, now I send the patches to the list.
> 
> > The patches are in upstream.
> > Kernel DT initial support is in 4.15 and Gigabit support is queued for 4.16.
> > u-boot support is #master, it will be in 2018.01
> 
> You split the patches in a strange way.
> I would suggest to have only two patches, one adding the changes needed
> for U-Boot and one for the kernel and image build. Your current split
> will have problems with git bisect when only your first patch is applied.
> 
> Otherwise these patches are looking good.
> 
> > regards,
> > -antony
> > 
> > Antony Antony (4):
> >   sunxi: add support for NanoPi NEO Plus2 board
> >   sunxi: add u-boot DT for NanoPi NEO Plus2 board
> >   sunxi: add DT node, dwmac ethernet for Nano Pi Neo Plus2
> >   sunxi: add kernel DT for NanoPi NEO Plus2 board
> > 
> >  package/boot/uboot-sunxi/Makefile                  |   9 +
> >  .../210-add-sunxi50i-nanopi-neo-plus2.patch        | 176 ++++++++++++++++
> >  target/linux/sunxi/image/cortex-a53.mk             |  10 +
> >  ...sun50i-support-for-nanopi-neo-plus2-board.patch | 229 
> > +++++++++++++++++++++
> >  ...-dts-sun50i-nanopi-neo-plus2-add-ethernet.patch |  46 +++++
> >  5 files changed, 470 insertions(+)
> >  create mode 100644 
> > package/boot/uboot-sunxi/patches/210-add-sunxi50i-nanopi-neo-plus2.patch
> >  create mode 100644 
> > target/linux/sunxi/patches-4.14/061-arm-dts-sun50i-support-for-nanopi-neo-plus2-board.patch
> >  create mode 100644 
> > target/linux/sunxi/patches-4.14/062-arm-dts-sun50i-nanopi-neo-plus2-add-ethernet.patch
> > 
>From 1edbee6871ac4858265ebce7160f6d24a7ec1b81 Mon Sep 17 00:00:00 2001
From: Antony Antony <ant...@phenome.org>
Date: Fri, 2 Mar 2018 11:05:52 +0100
Subject: [PATCH] sunxi: add kernel DT for NanoPi NEO Plus2 board

Linux Kernel upstream commits  d73413058, 27d7f9297

Signed-off-by: Antony Antony <ant...@phenome.org>

diff --git 
a/target/linux/sunxi/patches-4.14/061-arm-dts-sun50i-support-for-nanopi-neo-plus2-board.patch
 
b/target/linux/sunxi/patches-4.14/061-arm-dts-sun50i-support-for-nanopi-neo-plus2-board.patch
new file mode 100644
index 0000000000..69b6955338
--- /dev/null
+++ 
b/target/linux/sunxi/patches-4.14/061-arm-dts-sun50i-support-for-nanopi-neo-plus2-board.patch
@@ -0,0 +1,247 @@
+From 54cc3330c2334a0cea8cafc105a29c5d67f9fd32 Mon Sep 17 00:00:00 2001
+From: Antony Antony <ant...@phenome.org>
+Date: Fri, 2 Mar 2018 10:50:48 +0100
+Subject: [PATCH] arm64: allwinner: h5: add NanoPi NEO Plus2 DT support
+
+Add initial DT for NanoPi NEO Plus2 by FriendlyARM
+- Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
+- 1 GB DDR3 RAM
+- 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
+- micro SD card slot
+- Gigabit Ethernet (external RTL8211E-VB-CG chip)
+- 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
+- 2x USB 2.0 host ports & 2x USB via headers
+
+Kernel 4.15 commit d7341305863b
+Kernel 4.16 commit 27d7f9297027
+
+Signed-off-by: Antony Antony <ant...@phenome.org>
+
+diff --git a/arch/arm64/boot/dts/allwinner/Makefile 
b/arch/arm64/boot/dts/allwinner/Makefile
+index ff35e18..16fa7b9 100644
+--- a/arch/arm64/boot/dts/allwinner/Makefile
++++ b/arch/arm64/boot/dts/allwinner/Makefile
+@@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
+ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
+
+ always                := $(dtb-y)
+ subdir-y      := $(dts-dirs)
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
+new file mode 100644
+index 0000000..01dace4
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
+@@ -0,0 +1,210 @@
++/*
++ * Copyright (C) 2017 Antony Antony <ant...@phenome.org>
++ * Copyright (C) 2016 ARM Ltd.
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++#include "sun50i-h5.dtsi"
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
++#include <dt-bindings/pinctrl/sun4i-a10.h>
++
++/ {
++      model = "FriendlyARM NanoPi NEO Plus2";
++      compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
++
++      aliases {
++              ethernet0 = &emac;
++              serial0 = &uart0;
++      };
++
++      chosen {
++              stdout-path = "serial0:115200n8";
++      };
++
++      leds {
++              compatible = "gpio-leds";
++
++              pwr {
++                      label = "nanopi:green:pwr";
++                      gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
++                      default-state = "on";
++              };
++
++              status {
++                      label = "nanopi:red:status";
++                      gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
++              };
++      };
++
++      reg_gmac_3v3: gmac-3v3 {
++              compatible = "regulator-fixed";
++              pinctrl-names = "default";
++              regulator-name = "gmac-3v3";
++              regulator-min-microvolt = <3300000>;
++              regulator-max-microvolt = <3300000>;
++              startup-delay-us = <100000>;
++              enable-active-high;
++              gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
++      };
++
++      reg_vcc3v3: vcc3v3 {
++              compatible = "regulator-fixed";
++              regulator-name = "vcc3v3";
++              regulator-min-microvolt = <3300000>;
++              regulator-max-microvolt = <3300000>;
++      };
++
++      vdd_cpux: gpio-regulator {
++              compatible = "regulator-gpio";
++              pinctrl-names = "default";
++              regulator-name = "vdd-cpux";
++              regulator-type = "voltage";
++              regulator-boot-on;
++              regulator-always-on;
++              regulator-min-microvolt = <1100000>;
++              regulator-max-microvolt = <1300000>;
++              regulator-ramp-delay = <50>; /* 4ms */
++              gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
++              gpios-states = <0x1>;
++              states = <1100000 0x0
++                        1300000 0x1>;
++      };
++
++      wifi_pwrseq: wifi_pwrseq {
++              compatible = "mmc-pwrseq-simple";
++              pinctrl-names = "default";
++              reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
++              post-power-on-delay-ms = <200>;
++      };
++};
++
++&codec {
++      allwinner,audio-routing =
++              "Line Out", "LINEOUT",
++              "MIC1", "Mic",
++              "Mic",  "MBIAS";
++      status = "okay";
++};
++
++&ehci0 {
++      status = "okay";
++};
++
++&ehci3 {
++      status = "okay";
++};
++
++&emac {
++      pinctrl-names = "default";
++      pinctrl-0 = <&emac_rgmii_pins>;
++      phy-supply = <&reg_gmac_3v3>;
++      phy-handle = <&ext_rgmii_phy>;
++      phy-mode = "rgmii";
++      status = "okay";
++};
++
++&external_mdio {
++      ext_rgmii_phy: ethernet-phy@7 {
++              compatible = "ethernet-phy-ieee802.3-c22";
++              reg = <7>;
++      };
++};
++
++&mmc0 {
++      pinctrl-names = "default";
++      pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
++      vmmc-supply = <&reg_vcc3v3>;
++      bus-width = <4>;
++      cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
++      status = "okay";
++};
++
++&mmc1 {
++      pinctrl-names = "default";
++      pinctrl-0 = <&mmc1_pins_a>;
++      vmmc-supply = <&reg_vcc3v3>;
++      vqmmc-supply = <&reg_vcc3v3>;
++      mmc-pwrseq = <&wifi_pwrseq>;
++      bus-width = <4>;
++      non-removable;
++      status = "okay";
++
++      brcmf: wifi@1 {
++              reg = <1>;
++              compatible = "brcm,bcm4329-fmac";
++      };
++};
++
++&mmc2 {
++      pinctrl-names = "default";
++      pinctrl-0 = <&mmc2_8bit_pins>;
++      vmmc-supply = <&reg_vcc3v3>;
++      bus-width = <8>;
++      non-removable;
++      cap-mmc-hw-reset;
++      status = "okay";
++};
++
++&ohci0 {
++      status = "okay";
++};
++
++&ohci3 {
++      status = "okay";
++};
++
++&uart0 {
++      pinctrl-names = "default";
++      pinctrl-0 = <&uart0_pins_a>;
++      status = "okay";
++};
++
++&usb_otg {
++      dr_mode = "host";
++      status = "okay";
++};
++
++&usbphy {
++      /* USB Type-A ports' VBUS is always on */
++      status = "okay";
++};
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