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--- Begin Message ---On Wed, Dec 28, 2016 at 10:32 AM, John Crispin <j...@phrozen.org> wrote: > On 25/12/2016 14:33, Christian Lamparter wrote: >> >> I helped Antonio a bit. It turns out that the GE1 needs to be set to MII >> mode (The default is RGMII). As far as I can tell, he had added this setting >> already in the DTS. But the rt2880_port_init() didn't do anything with the >> phy mode. I've made a patch (attached) that will set the bits in SYSCTL1 >> and he's currently testing it. >> >> For now, I just added it to rt2880_port_init. However I don't know if the >> RT2880 uses the same registers and bits (Don't have the RT2880 datasheet). >> So, what do you think? > > I'd merge this path. could you submit it please with proper annotation, > SoB .... Do you have a RT2880 Datasheet that describe the SYSCTL1 register in detail? I'm asking because I don't really know if the bits do anything for the RT2880 too. (I think the RT2880 also should have a way to control whenever it's a RGMII/MII/RMII). Because as far as I can tell, the RT3883/3662 code needs to be extended to support the GE2 too. (This can be mostly copied from the existing soc_mt7620 code). The RT3883/3662 just lacks the internal switch otherwise it looks to be the same. Regards, Christian
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