On 05/31/2011 08:52 PM, Marcelo Tosatti wrote:
On Sun, May 29, 2011 at 07:41:57PM +0800, Yang, Wei Y wrote:
> This patch adds SMEP handling when setting CR4.
>
> Signed-off-by: Yang, Wei<[email protected]>
> Signed-off-by: Shan, Haitao<[email protected]>
> Signed-off-by: Li, Xin<[email protected]>
>
> ---
> arch/x86/kvm/x86.c | 15 +++++++++++++--
> 1 files changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 77c9d86..91bfc40 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -579,6 +579,14 @@ static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
> return best&& (best->ecx& bit(X86_FEATURE_XSAVE));
> }
>
> +static bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
> +{
> + struct kvm_cpuid_entry2 *best;
> +
> + best = kvm_find_cpuid_entry(vcpu, 7, 0);
> + return best&& (best->ebx& bit(X86_FEATURE_SMEP));
> +}
> +
> static void update_cpuid(struct kvm_vcpu *vcpu)
> {
> struct kvm_cpuid_entry2 *best;
> @@ -598,14 +606,17 @@ static void update_cpuid(struct kvm_vcpu *vcpu)
> int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
> {
> unsigned long old_cr4 = kvm_read_cr4(vcpu);
> - unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
> -
> + unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
> + X86_CR4_PAE | X86_CR4_SMEP;
> if (cr4& CR4_RESERVED_BITS)
> return 1;
>
> if (!guest_cpuid_has_xsave(vcpu)&& (cr4& X86_CR4_OSXSAVE))
> return 1;
>
> + if (!guest_cpuid_has_smep(vcpu)&& (cr4& X86_CR4_SMEP))
> + return 1;
> +
> if (is_long_mode(vcpu)) {
> if (!(cr4& X86_CR4_PAE))
> return 1;
A new field in vcpu->arch.mmu.base_role for smep is required
for shadow MMU (similar to nxe).
I plan to add that with my cr0.wp=0 fixup (it's only needed there, right?)
--
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.
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