Hello! > I agree on this, actually I consider this dangerous. Currently the > memory behind addr in QEMU (hw/intc/arm_gic_kvm.c:kvm_arm_gic_get() for > instance) is only uint32_t, so you have to take care to provide uint64_t > backing for those registers, which means that there must be a match > between the register size the kernel knows and the size userland thinks > of. So I'd rather see the access size controlled by userland
Ok, i will implement it this way. > Also the GIC specification says that everything must be accessible with > 32-bit accesses. Correct me if I am wrong on this, but vCPUs are not > supposed to run while you are getting/setting VGIC registers, right? Right. > So there shouldn't be any issues with non-atomic accesses to 64-bit > registers, which means you could just go ahead and do everything in > 32-bit only. I thought about it too, it's inconvenient. In the userland you would have to do two accesses and merge the result. It's just tedious. After all this API is not emulating guest behavior, it's just for reading/writing GIC state. So on next respin i'll add size bit. Kind regards, Pavel Fedin Expert Engineer Samsung Electronics Research center Russia -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
