2014-10-03 01:10+0300, Nadav Amit:
> DR7.LE should be cleared during task-switch. This feature is poorly 
> documented.
> For reference, see:
> http://pdos.csail.mit.edu/6.828/2005/readings/i386/s12_02.htm

SDM [17.2.4]:
  This feature is not supported in the P6 family processors, later IA-32
  processors, and Intel 64 processors.

AMD [2:13.1.1.4]:
  This bit is ignored by implementations of the AMD64 architecture.

Intel's formulation could mean that it isn't even zeroed, but if current
hardware behaves like that,

> Signed-off-by: Nadav Amit <na...@cs.technion.ac.il>
> ---

Reviewed-by: Radim Krčmář <rkrc...@redhat.com>
(It shouldn't change a thing.)

>  arch/x86/kvm/vmx.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 04fa1b8..4190eb5 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -5483,7 +5483,7 @@ static int handle_task_switch(struct kvm_vcpu *vcpu)
>       }
>  
>       /* clear all local breakpoint enable flags */
> -     vmcs_writel(GUEST_DR7, vmcs_readl(GUEST_DR7) & ~0x55);
> +     vmcs_writel(GUEST_DR7, vmcs_readl(GUEST_DR7) & ~0x155);
>  
>       /*
>        * TODO: What about debug traps on tss switch?
> -- 
> 1.9.1
> 
> --
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