Hi Paolo,
On Mon, Aug 18, 2014 at 05:50:31PM +0800, Wanpeng Li wrote:
>Section 11.11.2.3 of the SDM mentions "All other bits in the
>IA32_MTRR_PHYSBASEn
>and IA32_MTRR_PHYSMASKn registers are reserved; the processor generates a
>general-protection exception(#GP) if software attempts to write to them". This
>patch do it in kvm.
>
How about this one?
Regards,
Wanpeng Li
>Signed-off-by: Wanpeng Li <wanpeng...@linux.intel.com>
>---
> arch/x86/kvm/x86.c | 15 +++++++++++++--
> 1 file changed, 13 insertions(+), 2 deletions(-)
>
>diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
>index caaffeb..aa64c70 100644
>--- a/arch/x86/kvm/x86.c
>+++ b/arch/x86/kvm/x86.c
>@@ -1769,11 +1769,22 @@ static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr,
>u64 data)
> /* variable MTRRs */
> if (msr >= 0x200 && msr < 0x200 + 2 * KVM_NR_VAR_MTRR) {
> int idx, is_mtrr_mask;
>+ u64 mask = 0;
>
> idx = (msr - 0x200) / 2;
> is_mtrr_mask = msr - 0x200 - 2 * idx;
>- if (!is_mtrr_mask)
>- return valid_mtrr_type(data & 0xff);
>+ for (i = 63; i > boot_cpu_data.x86_phys_bits; i--)
>+ mask |= (1ULL << i);
>+ if (!is_mtrr_mask) {
>+ if (!valid_mtrr_type(data & 0xff))
>+ return false;
>+ mask |= 0xf00;
>+ } else
>+ mask |= 0x7ff;
>+ if (data & mask) {
>+ kvm_inject_gp(vcpu, 0);
>+ return false;
>+ }
> }
> return true;
> }
>--
>1.9.1
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