On Thu, May 29, 2014 at 06:12:07PM -0700, Andi Kleen wrote:
> {
> struct kvm_pmu *pmu = &vcpu->arch.pmu;
> @@ -407,6 +551,20 @@ int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct
> msr_data *msr_info)
> return 0;
> }
> break;
> + case MSR_IA32_DS_AREA:
> + pmu->ds_area = data;
> + return 0;
> + case MSR_IA32_PEBS_ENABLE:
> + if (data & ~0xf0000000fULL)
> + break;
Bit 63 == PS_ENABLE ?
> void kvm_handle_pmu_event(struct kvm_vcpu *vcpu)
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 33e8c02..4f39917 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -7288,6 +7288,12 @@ static void __noclone vmx_vcpu_run(struct kvm_vcpu
> *vcpu)
> atomic_switch_perf_msrs(vmx);
> debugctlmsr = get_debugctlmsr();
>
> + /* Move this somewhere else? */
Unless you hook into vcpu->arch.pmu.ds_area and perf_get_ds_area()
writers, it has to be at every vcpu entry.
Could compare values in MSR save area to avoid switch.
> + if (vcpu->arch.pmu.ds_area)
> + add_atomic_switch_msr(vmx, MSR_IA32_DS_AREA,
> + vcpu->arch.pmu.ds_area,
> + perf_get_ds_area());
Should clear_atomic_switch_msr before
add_atomic_switch_msr.
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