Guillaume Thouvenin wrote:
This series of patches emulate instructions shld and shrd. As those
instructions have three operands we introduce a decode set for the Src2
operand. By doing this, the opcode descriptor needs to be extend to 32
bit.
So this series of patches:
[1/5] extend the opcode descriptor to 32 bits
[2/5] add Src2 decode set
[3/5] add a new "implied 1" Src decode type
[4/5] add the assembler code for three operands (one operand is stored
in EXC)
[5/5] add the emulation of shld and shrd instructions
Applied, thanks.
--
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.
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