Marcelo Tosatti wrote:
On Sun, May 25, 2008 at 01:18:46PM +0300, Avi Kivity wrote:
pm_io_base = PM_IO_BASE;
+ pmtmr_base = cmos_readb(0x60);
+ pmtmr_base |= cmos_readb(0x61) << 8;
+ pmtmr_base |= cmos_readb(0x62) << 16;
+ pmtmr_base |= cmos_readb(0x63) << 24;
+ if (!pmtmr_base)
+ pmtmr_base = pm_io_base + 0x08;
You're splitting the ACPI ioport range into two. I think the correct
fix here is to have qemu supply a PMBA hint to the BIOS. If the hint is
present, the bios should locate pm_io_base there, and should also avoid
placing other pio resources there.
PBLK_BASE (processor block) is statically defined in acpi-dsdt.dsl, and
I don't see any easy way to change that dynamically.
In practice I don't see any problem with not having the PMBA registers
in a contiguous range, since I doubt any ACPI implementation will assume
PIIX4 specific details (ACPI driver looks for the register addresses in
FADT, so does not matter if they're contiguous or not).
Right, it's a cleanliness issue, not correctness.
The only guest I can think of that will care about the actual layout is
linuxbios/coreboot.
--
Do not meddle in the internals of kernels, for they are subtle and quick to
panic.
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