Right, but that will be beyond the scope of 5.1 as it involves new features.
You can see the proposed v6 ERC/DRC roadmap here https://docs.google.com/document/d/1qvCH9aHwCzp5qtKTna4jJXuloNU0b96gAxAHSKPuXpU/edit?usp=sharing Feel free to suggest where you feel it could be improved. Am Mo., 16. Juli 2018 um 14:44 Uhr schrieb hauptmech <hauptm...@gmail.com>: > Just a friendly reminder that net classes are not a good approach for > some of us. > > I have never used net classes because they make the assumption that one > want's constant trace/space on a net. > > Most of my boards these days are using components with BGA or LGA pad > spacing tighter than I want to use for the rest of the board. > > I have to keep all the new router features turned off so that I can lay > down tracks which violate the default netclass (which I keep set at a > medium trace/space so that my whole board is not laid out with the > minimum space my manufacturers can do, the alternative to is adjust the > default space as I go, but I find that I forget to change it back to the > larger space too often). > > > > On 17/07/18 04:56, jp charras wrote: > > Moreover if (or when) netclasses will take in account the layers and the > netclass management is more > > powerful, I am guessing this setup will be frequently modified, so it > deserves a easy and fast access. > > > _______________________________________________ > Mailing list: https://launchpad.net/~kicad-developers > Post to : kicad-developers@lists.launchpad.net > Unsubscribe : https://launchpad.net/~kicad-developers > More help : https://help.launchpad.net/ListHelp >
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