Hi, Chris! On 2016-08-02 21:33, Chris Pavlina wrote: >> Maybe: >> + Support for schematic versioning / timestamping / diff- and git-friendly >> I want to see (ideally in a graphical representation), what's the >> difference of two schematics on logic/netlist level as well as visually >> re-arranged circuits. >> I believe that this could also affect the file format - or - some >> hints stored in the file could make it much more easy to visualize >> differences. > > An external script was shared in IRC this morning that does this; I > believe the author intends to share it publicly once it has a bit more > polish. What sort of hints would you store?
I didn't see that script yet. Would need to have a look first... I don't know how these "hints" might look like. They could consider, how the schematic was created or what components belong together in the schematics. Timestamping (tstamp xxx) of about everything doesn't harm, but it seems a bit odd to me. Hence, it would be fun to be able to play rewind and forward in the whole development-cycle of a design. I am not sure how to support version management easily regarding that. Timestamps can be quite annoying, when that's the only change. Another idea: Visually connected components could be detected as a "subcircuit" or simply a "group" of components and might become one blob in the schematic file. The current file format seems rather "flat" regarding that - Components and wires are separated from each other or mixed/interleaved without further associations. Hmm... no more cents, here... Regards, Clemens _______________________________________________ Mailing list: https://launchpad.net/~kicad-developers Post to : kicad-developers@lists.launchpad.net Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
