Public bug reported:
== Comment: #0 - Michael Ranweiler - 2019-10-07 01:52:38 ==
On POWER9, under some circumstances, a broadcast TLB invalidation will fail to
invalidate the ERAT cache on some threads when there are parallel
mtpidr/mtlpidr happening on other threads of the same core. This can cause
stores to continue to go to a page after it's unmapped.
The workaround is to force an ERAT flush using PID=0 or LPID=0 tlbie
flush. This additional TLB flush will cause the ERAT cache invalidation.
Since we are using PID=0 or LPID=0, we don't get filtered out by the TLB
snoop filtering logic.
We need to still follow this up with another tlbie to take care of store
vs tlbie ordering issue explained in commit: a5d4b5891c2f ("powerpc/mm:
Fixup tlbie vs store ordering issue on POWER9"). The presence of ERAT
cache implies we can still get new stores and they may miss store queue
marking flush.
The upstream git commits to resolve the problem:
https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?h=fixes&id=677733e296b5c7a37c47da391fc70a43dc40bd67
https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?h=fixes&id=09ce98cacd51fcd0fa0af2f79d1e1d3192f4cbb0
https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?h=fixes&id=047e6575aec71d75b765c22111820c4776cd1c43
** Affects: linux (Ubuntu)
Importance: Undecided
Assignee: Ubuntu on IBM Power Systems Bug Triage (ubuntu-power-triage)
Status: New
** Tags: architecture-ppc64le bugnameltc-181791 severity-medium
targetmilestone-inin---
** Tags added: architecture-ppc64le bugnameltc-181791 severity-medium
targetmilestone-inin---
** Changed in: ubuntu
Assignee: (unassigned) => Ubuntu on IBM Power Systems Bug Triage
(ubuntu-power-triage)
** Package changed: ubuntu => linux (Ubuntu)
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https://bugs.launchpad.net/bugs/1848193
Title:
Fixup tlbie vs store ordering issue on POWER9
Status in linux package in Ubuntu:
New
Bug description:
== Comment: #0 - Michael Ranweiler - 2019-10-07 01:52:38 ==
On POWER9, under some circumstances, a broadcast TLB invalidation will fail
to invalidate the ERAT cache on some threads when there are parallel
mtpidr/mtlpidr happening on other threads of the same core. This can cause
stores to continue to go to a page after it's unmapped.
The workaround is to force an ERAT flush using PID=0 or LPID=0 tlbie
flush. This additional TLB flush will cause the ERAT cache
invalidation. Since we are using PID=0 or LPID=0, we don't get
filtered out by the TLB snoop filtering logic.
We need to still follow this up with another tlbie to take care of
store vs tlbie ordering issue explained in commit: a5d4b5891c2f
("powerpc/mm: Fixup tlbie vs store ordering issue on POWER9"). The
presence of ERAT cache implies we can still get new stores and they
may miss store queue marking flush.
The upstream git commits to resolve the problem:
https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?h=fixes&id=677733e296b5c7a37c47da391fc70a43dc40bd67
https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?h=fixes&id=09ce98cacd51fcd0fa0af2f79d1e1d3192f4cbb0
https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?h=fixes&id=047e6575aec71d75b765c22111820c4776cd1c43
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