https://bugs.kde.org/show_bug.cgi?id=425232
--- Comment #19 from Carl Love <c...@us.ibm.com> --- comment 12 The comment is wrong. That comment should be on the setb instruction. I moved the comment and added comments for the four set instructions in this switch statement as follows: Fix for Add ISA 3.1 Set Boolean Extension instruction support --- VEX/priv/guest_ppc_toIR.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/VEX/priv/guest_ppc_toIR.c b/VEX/priv/guest_ppc_toIR.c index 6323c175e..4fb216663 100644 --- a/VEX/priv/guest_ppc_toIR.c +++ b/VEX/priv/guest_ppc_toIR.c @@ -6883,6 +6883,9 @@ static Bool dis_int_cmp ( UInt prefix, UInt theInstr ) case 0x080: // setb (Set Boolean) { + /* Set Boolean Condition in result register. The result register + is set to all ones if the condition is true and all zeros + otherwise. */ UChar rT_addr = ifieldRegDS(theInstr); Int bfa = IFIELD(theInstr, 18, 3); IRTemp cr = newTemp(Ity_I32); @@ -9152,10 +9155,10 @@ static Bool dis_set_bool_condition ( UInt prefixInstr, U Int theInstr ) /* There is no prefixed version of these instructions. */ vassert( !prefix_instruction( prefixInstr ) ); - /* Set Boolean Condition in result register. The result register is set - to all ones if the condition is true and all zeros otherwise. */ switch (opc2) { case 0x180: // setbc + /* If bit BI of the CR contains a 1, register RT is set to 1. + Otherwise, register RT is set to 0. */ DIP(" setbc %u,%u\n", rT_addr, BI); Iop_1XtoX = mode64 ? Iop_1Uto64 : Iop_1Uto32; putIReg( rT_addr, unop( Iop_1XtoX, @@ -9165,6 +9168,8 @@ static Bool dis_set_bool_condition ( UInt prefixInstr, UIn t theInstr ) break; case 0x1A0: // setbcr + /* If bit BI of the CR contains a 1, register RT is set to 0. + Otherwise, register RT is set to 1. */ DIP(" setbcr %u,%u\n", rT_addr, BI); Iop_1XtoX = mode64 ? Iop_1Uto64 : Iop_1Uto32; putIReg( rT_addr, unop( Iop_1XtoX, @@ -9174,6 +9179,8 @@ static Bool dis_set_bool_condition ( UInt prefixInstr, UIn t theInstr ) break; case 0x1C0: // setnbc + /* If bit BI of the CR contains a 1, register RT is set to -1. + Otherwise, register RT is set to 0. */ DIP(" setnbc %u,%u\n", rT_addr, BI); Iop_1XtoX = mode64 ? Iop_1Sto64 : Iop_1Sto32; putIReg( rT_addr, binop( mkSzOp(ty, Iop_And8), @@ -9185,6 +9192,8 @@ static Bool dis_set_bool_condition ( UInt prefixInstr, UIn t theInstr ) break; case 0x1E0: // setnbcr + /* If bit BI of the CR contains a 1, register RT is set to -1. + Otherwise, register RT is set to 0. */ DIP(" setnbcr %u,%u\n", rT_addr, BI); Iop_1XtoX = mode64 ? Iop_1Sto64 : Iop_1Sto32; putIReg( rT_addr, binop( mkSzOp(ty, Iop_And8), Please let me know if the comments and code look OK now. Thanks for catching that issue. -- You are receiving this mail because: You are watching all bug changes.