Add support for the M4Us found in the MT6795 Helio X10 SoC.

Signed-off-by: AngeloGioacchino Del Regno 
<angelogioacchino.delre...@collabora.com>
---
 drivers/iommu/mtk_iommu.c | 20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 71b2ace74cd6..3d802dd3f377 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -157,6 +157,7 @@
 enum mtk_iommu_plat {
        M4U_MT2712,
        M4U_MT6779,
+       M4U_MT6795,
        M4U_MT8167,
        M4U_MT8173,
        M4U_MT8183,
@@ -953,7 +954,8 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data 
*data, unsigned int ban
         * Global control settings are in bank0. May re-init these global 
registers
         * since no sure if there is bank0 consumers.
         */
-       if (data->plat_data->m4u_plat == M4U_MT8173) {
+       if (data->plat_data->m4u_plat == M4U_MT6795 ||
+           data->plat_data->m4u_plat == M4U_MT8173) {
                regval = F_MMU_PREFETCH_RT_REPLACE_MOD |
                         F_MMU_TF_PROT_TO_PROGRAM_ADDR_MT8173;
        } else {
@@ -1138,6 +1140,9 @@ static int mtk_iommu_probe(struct platform_device *pdev)
                case M4U_MT2712:
                        p = "mediatek,mt2712-infracfg";
                        break;
+               case M4U_MT6795:
+                       p = "mediatek,mt6795-infracfg";
+                       break;
                case M4U_MT8173:
                        p = "mediatek,mt8173-infracfg";
                        break;
@@ -1404,6 +1409,18 @@ static const struct mtk_iommu_plat_data mt6779_data = {
        .larbid_remap  = {{0}, {1}, {2}, {3}, {5}, {7, 8}, {10}, {9}},
 };
 
+static const struct mtk_iommu_plat_data mt6795_data = {
+       .m4u_plat     = M4U_MT6795,
+       .flags        = HAS_4GB_MODE | HAS_BCLK | RESET_AXI |
+                       HAS_LEGACY_IVRP_PADDR | MTK_IOMMU_TYPE_MM,
+       .inv_sel_reg  = REG_MMU_INV_SEL_GEN1,
+       .banks_num    = 1,
+       .banks_enable = {true},
+       .iova_region  = single_domain,
+       .iova_region_nr = ARRAY_SIZE(single_domain),
+       .larbid_remap = {{0}, {1}, {2}, {3}, {4}}, /* Linear mapping. */
+};
+
 static const struct mtk_iommu_plat_data mt8167_data = {
        .m4u_plat     = M4U_MT8167,
        .flags        = RESET_AXI | HAS_LEGACY_IVRP_PADDR | MTK_IOMMU_TYPE_MM,
@@ -1515,6 +1532,7 @@ static const struct mtk_iommu_plat_data mt8195_data_vpp = 
{
 static const struct of_device_id mtk_iommu_of_ids[] = {
        { .compatible = "mediatek,mt2712-m4u", .data = &mt2712_data},
        { .compatible = "mediatek,mt6779-m4u", .data = &mt6779_data},
+       { .compatible = "mediatek,mt6795-m4u", .data = &mt6795_data},
        { .compatible = "mediatek,mt8167-m4u", .data = &mt8167_data},
        { .compatible = "mediatek,mt8173-m4u", .data = &mt8173_data},
        { .compatible = "mediatek,mt8183-m4u", .data = &mt8183_data},
-- 
2.35.1

_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

Reply via email to