D1 contains an IOMMU similar to the one in the H6 SoC, but the D1
variant has no external reset signal.
Signed-off-by: Samuel Holland <sam...@sholland.org>
---
.../iommu/allwinner,sun50i-h6-iommu.yaml | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git
a/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml
b/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml
index 5e125cf2a88b..18d3451d4dd5 100644
--- a/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml
+++ b/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml
@@ -17,7 +17,9 @@ properties:
The content of the cell is the master ID.
compatible:
- const: allwinner,sun50i-h6-iommu
+ enum:
+ - allwinner,sun20i-d1-iommu
+ - allwinner,sun50i-h6-iommu
reg:
maxItems: 1
@@ -37,7 +39,17 @@ required:
- reg
- interrupts
- clocks
- - resets
+
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - allwinner,sun50i-h6-iommu
+
+then:
+ required:
+ - resets
additionalProperties: false
--
2.35.1
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