Hi, Thomas, On Wed, Sep 29, 2021 at 09:51:15AM -0700, Luck, Tony wrote: > > There is zero requirement to look at TIF_NEED_FPU_LOAD or > > fpregs_state_valid() simply because the #GP comes straight from user > > space which means the FPU registers contain the current tasks user space > > state. > > Just to double confirm ... there is no point in the #GP handler up to this > point > where pre-emption can occur?
Same question here. The fixup function is called after cond_local_irq_enable(). If an interrupt comes before fixup_pasid_exception(), the interrupt may use FPU and call kernel_fpu_begin_mask()->set(TIF_NEED_FPU_LOAD)-> __cpu_invalidate_fpregs_state(). Then writing to the IA32_PASID MSR. When exiting to user, the FPU states will be restored to the FPU regs including the IA32_PASID MSR. So the MSR could be different from the value written in fixup_pasid_execption(). Is it possible? Or should fixup_pasid_exception() be called before cond_local_irq_enable()? Thanks. -Fenghua _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
