> -----Original Message----- > From: Laurentiu Tudor [mailto:laurentiu.tu...@nxp.com] > Sent: 19 July 2021 14:46 > To: Shameerali Kolothum Thodi <shameerali.kolothum.th...@huawei.com>; > linux-arm-ker...@lists.infradead.org; linux-a...@vger.kernel.org; > iommu@lists.linux-foundation.org > Cc: j...@solid-run.com; Linuxarm <linux...@huawei.com>; > steven.pr...@arm.com; Guohanjun (Hanjun Guo) <guohan...@huawei.com>; > yangyicong <yangyic...@huawei.com>; sami.muja...@arm.com; > robin.mur...@arm.com; wanghuiqiang <wanghuiqi...@huawei.com> > Subject: Re: [PATCH v6 0/9] ACPI/IORT: Support for IORT RMR node > > On 7/16/2021 11:34 AM, Shameer Kolothum wrote: > > Hi, > > > > Major Changes from v5: > > - Addressed comments from Robin & Lorenzo. > > : Moved iort_parse_rmr() to acpi_iort_init() from > > iort_init_platform_devices(). > > : Removed use of struct iort_rmr_entry during the initial > > parse. Using struct iommu_resv_region instead. > > : Report RMR address alignment and overlap errors, but continue. > > : Reworked arm_smmu_init_bypass_stes() (patch # 6). > > - Updated SMMUv2 bypass SMR code. Thanks to Jon N (patch #8). > > - Set IOMMU protection flags(IOMMU_CACHE, IOMMU_MMIO) based > > on Type of RMR region. Suggested by Jon N.
[...] > > > Validated on a NXP LX2160A with SMMUv2, so: > > Tested-by: Laurentiu Tudor <laurentiu.tu...@nxp.com> > Thanks for testing. Hi All, A gentle ping on this... I am planning to respin this with the fix suggested by Steve in patch #8 for SMMUv2. But would wait till other patches get a proper review so that I can include those comments as well if any. Thanks, Shameer _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
