[AMD Public Use] > -----Original Message----- > From: jroe...@suse.de <jroe...@suse.de> > Sent: Friday, August 28, 2020 11:30 AM > To: Deucher, Alexander <alexander.deuc...@amd.com> > Cc: Kuehling, Felix <felix.kuehl...@amd.com>; Joerg Roedel > <j...@8bytes.org>; iommu@lists.linux-foundation.org; Huang, Ray > <ray.hu...@amd.com>; Koenig, Christian <christian.koe...@amd.com>; > Lendacky, Thomas <thomas.lenda...@amd.com>; Suthikulpanit, Suravee > <suravee.suthikulpa...@amd.com>; linux-ker...@vger.kernel.org > Subject: Re: [PATCH 0/2] iommu/amd: Fix IOMMUv2 devices when SME is > active > > On Fri, Aug 28, 2020 at 03:11:32PM +0000, Deucher, Alexander wrote: > > There are hw bugs on Raven and probably Carrizo/Stoney where they need > > 1:1 mapping to avoid bugs in some corner cases with the displays. > > Other GPUs should be fine. The VIDs is 0x1002 and the DIDs are 0x15dd > > and 0x15d8 for raven variants and 0x9870, 0x9874, 0x9875, 0x9876, > > 0x9877 and 0x98e4 for carrizo and stoney. As long as we preserve the > > 1:1 mapping for those asics, we should be fine. > > Okay, Stoney at least has no Zen-based CPU, so no support for memory > encryption anyway. How about Raven, is it paired with a Zen CPU?
Ah, right, So CZ and ST are not an issue. Raven is paired with Zen based CPUs. Thanks, Alex _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu