Hi Joerg,
On 1/17/20 5:59 PM, Joerg Roedel wrote:
On Thu, Jan 16, 2020 at 09:52:36AM +0800, Lu Baolu wrote:
Address field in device TLB invalidation descriptor is qualified
by the S field. If S field is zero, a single page at page address
specified by address [63:12] is requested to be invalidated. If S
field is set, the least significant bit in the address field with
value 0b (say bit N) indicates the invalidation address range. The
spec doesn't require the address [N - 1, 0] to be cleared, hence
remove the unnecessary WARN_ON_ONCE().
Otherwise, the caller might set "mask = MAX_AGAW_PFN_WIDTH" in order
to invalidating all the cached mappings on an endpoint, and below
overflow error will be triggered.
[...]
UBSAN: Undefined behaviour in drivers/iommu/dmar.c:1354:3
shift exponent 64 is too large for 64-bit type 'long long unsigned int'
[...]
Reported-and-tested-by: Frank <fgn...@posteo.de>
Signed-off-by: Lu Baolu <baolu...@linux.intel.com>
Does this need a Fixes and/or stable tag?
This doesn't cause any errors, just an unnecessary checking of
"0 & ((1UL << 64) - 1)"
in some cases.
Regards,
Joerg
Best regards,
baolu
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
