On Sun, Feb 17, 2019 at 1:08 AM Yong Wu <yong...@mediatek.com> wrote:
>
> The protect memory setting is a little different in the different SoCs.
> In the register REG_MMU_CTRL_REG(0x110), the TF_PROT(translation fault
> protect) shift bit is normally 4 while it shift 5 bits only in the
> mt8173. This patch delete the complex MACRO and use a common if-else
> instead.
>
> Signed-off-by: Yong Wu <yong...@mediatek.com>

Reviewed-by: Evan Green <evgr...@chromium.org>
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