From: Mitchel Humpherys <mitch...@codeaurora.org> The PL330 performs privileged instruction fetches. This can result in SMMU permission faults on SMMUs that implement the ARMv8 VMSA, which specifies that mappings that are writeable at one execution level shall not be executable at any higher-privileged level. Fix this by using the DMA_ATTR_PRIVILEGED attribute, which will ensure that the microcode IOMMU mapping is only accessible to the privileged level.
Cc: Dan Williams <dan.j.willi...@intel.com> Cc: Vinod Koul <vinod.k...@intel.com> Reviewed-by: Robin Murphy <robin.mur...@arm.com> Tested-by: Robin Murphy <robin.mur...@arm.com> Acked-by: Will Deacon <will.dea...@arm.com> Signed-off-by: Mitchel Humpherys <mitch...@codeaurora.org> --- [V6] No change drivers/dma/pl330.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c index 030fe05..1a8bac2 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c @@ -1854,14 +1854,16 @@ static int dmac_alloc_resources(struct pl330_dmac *pl330) { int chans = pl330->pcfg.num_chan; int ret; + unsigned long dma_attrs = DMA_ATTR_PRIVILEGED; /* * Alloc MicroCode buffer for 'chans' Channel threads. * A channel's buffer offset is (Channel_Id * MCODE_BUFF_PERCHAN) */ - pl330->mcode_cpu = dma_alloc_coherent(pl330->ddma.dev, + pl330->mcode_cpu = dma_alloc_attrs(pl330->ddma.dev, chans * pl330->mcbufsz, - &pl330->mcode_bus, GFP_KERNEL); + &pl330->mcode_bus, GFP_KERNEL, + dma_attrs); if (!pl330->mcode_cpu) { dev_err(pl330->ddma.dev, "%s:%d Can't allocate memory!\n", __func__, __LINE__); -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu