On Wed, Apr 13, 2016 at 06:12:59PM +0100, Robin Murphy wrote: > MMU-500 erratum #841119 is tickled by a particular set of circumstances > interacting with the next-page prefetcher. Since said prefetcher is > quite dumb and actually detrimental to performance in some cases (by > causing unwanted TLB evictions for non-sequential access patterns), we > lose very little by turning it off, and what we gain is a guarantee that > the erratum is never hit. > > As a bonus, the same workaround will also prevent erratum #826419 once > v7 short descriptor support is implemented. > > CC: Catalin Marinas <catalin.mari...@arm.com> > CC: Will Deacon <will.dea...@arm.com> > Signed-off-by: Robin Murphy <robin.mur...@arm.com> > --- > Documentation/arm64/silicon-errata.txt | 1 + > drivers/iommu/arm-smmu.c | 16 +++++++++++++++- > 2 files changed, 16 insertions(+), 1 deletion(-) > > diff --git a/Documentation/arm64/silicon-errata.txt > b/Documentation/arm64/silicon-errata.txt > index 806f91c..c6938e5 100644 > --- a/Documentation/arm64/silicon-errata.txt > +++ b/Documentation/arm64/silicon-errata.txt > @@ -53,6 +53,7 @@ stable kernels. > | ARM | Cortex-A57 | #832075 | ARM64_ERRATUM_832075 > | > | ARM | Cortex-A57 | #852523 | N/A > | > | ARM | Cortex-A57 | #834220 | ARM64_ERRATUM_834220 > | > +| ARM | MMU-500 | #841119,#826419 | N/A > |
Found it :) Will _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
