On Wed, Jan 07, 2015 at 07:29:15PM +0000, Arnd Bergmann wrote: > On Wednesday 07 January 2015 18:57:05 Will Deacon wrote: > > Sorry for the delay on this, I had to do a bit of digging. > > > > On Mon, Dec 22, 2014 at 01:36:01PM +0000, Arnd Bergmann wrote: > > > Do you think it's possible that we might have to deal with a single PCI > > > host > > > that is connected two different SMMU instances for the purposes of > > > extending > > > the StreamID space from 15 to 16 bits? I think we would have trouble > > > expressing this with the current syntax. > > > > Unfortunately, this sounds like something we may well have to support. > > Whilst the SMMUv2 architecture did grow a late extension to support 16-bit > > StreamIDs, that may have been too late for all silicon vendors and, as such, > > I'm not confident that such systems will present a single software interface > > for their SMMU. > > So it's technically possible to connect two SMMU instances to a single > PCIe root complex? I knew that there is at least one vendor (AMD) that > can only do 128 bus numbers on PCIe, which seems a much simpler workaround.
I think you'd need to add some additional logic around the host controller, but I don't see why it wouldn't be possible to send the first 32k SIDs off to one SMMU and the other 32k off somewhere else -- those IDs are carried on the bus, after all. That said, something being `technically possible' isn't always a good reason for us to support it :) Will _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
