Hi, I'm doing research about support for I/O page faults and I'm trying to find out what devices are using it today.
I've notice that the AMD IOMMUv2 driver has support for I/O page faults. However I'm a bit confused as to how it relates to ATS/PRI. I've gotten the impression that the code is used by AMD GPUs to implement HSA. If I understand correctly HSA is implemented with integrated GPUs. I would assume such GPUs wouldn't use PCIe to access memory, is that indeed the case? Do those GPUs use PRI to generate page faults anyway? Thanks, Ilya
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