> -----Original Message-----
> From: Simon Horman <[email protected]>
> Sent: Thursday, March 19, 2026 6:45 PM
> To: Nitka, Grzegorz <[email protected]>
> Cc: [email protected]; [email protected]; intel-wired-
> [email protected]; Oros, Petr <[email protected]>;
> [email protected]; [email protected]; Kitszel, Przemyslaw
> <[email protected]>; Nguyen, Anthony L
> <[email protected]>; [email protected]; Vecera,
> Ivan <[email protected]>; [email protected]; Kubalewski, Arkadiusz
> <[email protected]>; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; Loktionov, Aleksandr
> <[email protected]>
> Subject: Re: [PATCH net-next 1/8] dpll: add new DPLL type for transmit clock
> (TXC) usage
>
> On Wed, Mar 18, 2026 at 10:06:47AM +0100, Grzegorz Nitka wrote:
> > Extend the DPLL subsystem with a new DPLL type, DPLL_TYPE_TXC,
> > representing devices that drive a transmit reference clock. Certain
> > PHYs, MACs and SerDes blocks use a dedicated TX reference clock for
> > link operation, and this clock domain is distinct from PPS- and
> > EEC-driven synchronization sources. Defining a dedicated type allows
> > user space and drivers to correctly classify and configure DPLLs
> > intended for TX clock generation.
> >
> > The corresponding netlink specification is updated to expose "txc"
> >
> > Reviewed-by: Arkadiusz Kubalewski <[email protected]>
> > Reviewed-by: Aleksandr Loktionov <[email protected]>
> > Signed-off-by: Grzegorz Nitka <[email protected]>
> > ---
> > Documentation/netlink/specs/dpll.yaml | 3 +++
> > include/uapi/linux/dpll.h | 2 ++
> > 2 files changed, 5 insertions(+)
> >
> > diff --git a/Documentation/netlink/specs/dpll.yaml
> b/Documentation/netlink/specs/dpll.yaml
> > index 3dd48a32f783..2a2ee37a1fc0 100644
> > --- a/Documentation/netlink/specs/dpll.yaml
> > +++ b/Documentation/netlink/specs/dpll.yaml
> > @@ -138,6 +138,9 @@ definitions:
> > -
> > name: eec
> > doc: dpll drives the Ethernet Equipment Clock
> > + -
> > + name: txc
> > + doc: dpll drives Tx reference clock
> > render-max: true
> > -
> > type: enum
> > diff --git a/include/uapi/linux/dpll.h b/include/uapi/linux/dpll.h
> > index de0005f28e5c..a277d08ac264 100644
> > --- a/include/uapi/linux/dpll.h
> > +++ b/include/uapi/linux/dpll.h
> > @@ -109,10 +109,12 @@ enum dpll_clock_quality_level {
> > * enum dpll_type - type of dpll, valid values for DPLL_A_TYPE attribute
> > * @DPLL_TYPE_PPS: dpll produces Pulse-Per-Second signal
> > * @DPLL_TYPE_EEC: dpll drives the Ethernet Equipment Clock
> > + * @DPLL_TYPE_TXC: dpll drives Tx reference clock signal
> > */
> > enum dpll_type {
> > DPLL_TYPE_PPS = 1,
> > DPLL_TYPE_EEC,
> > + DPLL_TYPE_TXC,
> >
> > /* private: */
> > __DPLL_TYPE_MAX,
>
> I think that the spec and source code changes are inconsistent in this
> patch.
>
Thanks Simon for your review.
Yes, my bad. I didn't attached those autogenerated files.
To be added in the next iteration.
> With it applied I see:
>
> ./tools/net/ynl/ynl-regen.sh -f && git diff
> diff --git a/drivers/dpll/dpll_nl.c b/drivers/dpll/dpll_nl.c
> index a2b22d492114..4182bdbb6dbb 100644
> --- a/drivers/dpll/dpll_nl.c
> +++ b/drivers/dpll/dpll_nl.c
> @@ -34,7 +34,7 @@ const struct nla_policy
> dpll_reference_sync_nl_policy[DPLL_A_PIN_STATE + 1] = {
> static const struct nla_policy dpll_device_id_get_nl_policy[DPLL_A_TYPE + 1]
> = {
> [DPLL_A_MODULE_NAME] = { .type = NLA_NUL_STRING, },
> [DPLL_A_CLOCK_ID] = { .type = NLA_U64, },
> - [DPLL_A_TYPE] = NLA_POLICY_RANGE(NLA_U32, 1, 2),
> + [DPLL_A_TYPE] = NLA_POLICY_RANGE(NLA_U32, 1, 3),
> };
>
> /* DPLL_CMD_DEVICE_GET - do */
> diff --git a/include/uapi/linux/dpll.h b/include/uapi/linux/dpll.h
> index a277d08ac264..8f6db5d5bf0c 100644
> --- a/include/uapi/linux/dpll.h
> +++ b/include/uapi/linux/dpll.h
> @@ -109,7 +109,7 @@ enum dpll_clock_quality_level {
> * enum dpll_type - type of dpll, valid values for DPLL_A_TYPE attribute
> * @DPLL_TYPE_PPS: dpll produces Pulse-Per-Second signal
> * @DPLL_TYPE_EEC: dpll drives the Ethernet Equipment Clock
> - * @DPLL_TYPE_TXC: dpll drives Tx reference clock signal
> + * @DPLL_TYPE_TXC: dpll drives Tx reference clock
> */
> enum dpll_type {
> DPLL_TYPE_PPS = 1,
>
> --
> pw-bot: changes-requested
