On Thu, Jan 2, 2025 at 9:43 AM Haifeng Xu <haifeng...@shopee.com> wrote: > > > > On 2025/1/2 16:13, Eric Dumazet wrote: > > On Thu, Jan 2, 2025 at 4:53 AM Haifeng Xu <haifeng...@shopee.com> wrote: > >> > >> Hi masters, > >> > >> We use the Intel Corporation 82599ES NIC in our production > >> environment. And it has 63 rx queues, every rx queue interrupt is > >> processed by a single cpu. > >> The RSS configuration can be seen as follow: > >> > >> RX flow hash indirection table for eno5 with 63 RX ring(s): > >> 0: 0 1 2 3 4 5 6 7 > >> 8: 8 9 10 11 12 13 14 15 > >> 16: 0 1 2 3 4 5 6 7 > >> 24: 8 9 10 11 12 13 14 15 > >> 32: 0 1 2 3 4 5 6 7 > >> 40: 8 9 10 11 12 13 14 15 > >> 48: 0 1 2 3 4 5 6 7 > >> 56: 8 9 10 11 12 13 14 15 > >> 64: 0 1 2 3 4 5 6 7 > >> 72: 8 9 10 11 12 13 14 15 > >> 80: 0 1 2 3 4 5 6 7 > >> 88: 8 9 10 11 12 13 14 15 > >> 96: 0 1 2 3 4 5 6 7 > >> 104: 8 9 10 11 12 13 14 15 > >> 112: 0 1 2 3 4 5 6 7 > >> 120: 8 9 10 11 12 13 14 15 > >> > >> The maximum number of RSS queues is 16. So I have some questions > >> about this. Will other cpus except 0~15 receive the rx interrupts? > >> > >> In our production environment, cpu 16~62 also receive the rx > >> interrupts. Was our RSS misconfigured? > > > > It really depends on which cpus are assigned to each IRQ. > > > > Hi Eric, > > Each irq was assigned to a single cpu, for exapmle: > > irq cpu > > 117 0 > 118 1 > > ...... > > 179 62 > > All cpus trigger interrupts not only cpus 0~15. > It seems that the result is inconsistent with the RSS hash value. > >
I misread your report, I thought you had 16 receive queues. Why don't you change "ethtool -L eno5 rx 16", instead of trying to configure RSS manually ?
