E825 products have incorrect initialization procedure, which may lead to
initialization failures and register values.
Fix E825 products initialization by adding correct sync delay, checking
the PHY revision only for current PHY and adding proper destination
device when reading port/quad.
In addition, E825 uses PF ID for indexing per PF registers and as
a primary PHY lane number, which is incorrect.
Karol Kolacinski (4):
ice: Fix E825 initialization
ice: Fix quad registers read on E825
ice: Fix ETH56G FC-FEC Rx offset value
ice: Add correct PHY lane assignment
.../net/ethernet/intel/ice/ice_adminq_cmd.h | 1 +
drivers/net/ethernet/intel/ice/ice_common.c | 47 ++-
drivers/net/ethernet/intel/ice/ice_common.h | 1 +
drivers/net/ethernet/intel/ice/ice_main.c | 6 +-
drivers/net/ethernet/intel/ice/ice_ptp.c | 23 +-
drivers/net/ethernet/intel/ice/ice_ptp.h | 4 +-
.../net/ethernet/intel/ice/ice_ptp_consts.h | 77 +----
drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 281 ++++++++++--------
drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 37 ++-
drivers/net/ethernet/intel/ice/ice_sbq_cmd.h | 7 +-
drivers/net/ethernet/intel/ice/ice_type.h | 2 -
11 files changed, 247 insertions(+), 239 deletions(-)
V2 -> V3: Removed net-next hunks from "ice: Fix E825 initialization",
replaced lower/upper_32_bits calls with lower/upper_16_bits
in "ice: Fix quad registers read on E825",
improved ice_get_phy_lane_number function in "ice: Add correct
PHY lane assignment"
V1 -> V2: Removed net-next hunks from "ice: Fix E825 initialization",
whole "ice: Remove unnecessary offset calculation for PF
scoped registers" patch and fixed kdoc in "ice: Fix quad
registers read on E825"
base-commit: 19acd6818aa7404d96cd5d0e4373d4ebe71448c2
--
2.39.3
