> -----Original Message----- > From: Intel-wired-lan <intel-wired-lan-boun...@osuosl.org> On Behalf Of Karol > Kolacinski > Sent: Wednesday, April 24, 2024 7:00 PM > To: intel-wired-...@lists.osuosl.org > Cc: Temerkhanov, Sergey <sergey.temerkha...@intel.com>; > net...@vger.kernel.org; Kubalewski, Arkadiusz > <arkadiusz.kubalew...@intel.com>; Kolacinski, Karol > <karol.kolacin...@intel.com>; Nguyen, Anthony L <anthony.l.ngu...@intel.com>; > Kitszel, Przemyslaw <przemyslaw.kits...@intel.com> > Subject: [Intel-wired-lan] [PATCH v10 iwl-next 05/12] ice: Move CGU block > > From: Sergey Temerkhanov <sergey.temerkha...@intel.com> > > Move CGU block to the beginning of ice_ptp_hw.c > > Signed-off-by: Sergey Temerkhanov <sergey.temerkha...@intel.com> > Reviewed-by: Przemek Kitszel <przemyslaw.kits...@intel.com> > Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalew...@intel.com> > Signed-off-by: Karol Kolacinski <karol.kolacin...@intel.com> > --- > V7 -> V8: brought back P_REG_40B_HIGH_S due to 32 bit compatibility issue > V6 -> V7: - removed leftover code in ice_read_cgu_reg_e82x() > - changed .data assignment in ice_write_cgu_reg_e82x() > - restored u32 cast in ice_ptp_reset_ts_memory_quad_e82x() to avoid > false positive warning > V5 -> V6: - adjusted returns in ice_read/write_cgu_reg_e82x() > - added cgu_msg init when declaring in ice_read/write_cgu_reg_e82x() > - changed TS_PHY_LOW_S to TS_PHY_LOW_M and adjusted with > FIELD_PREP() > - removed unncecessary casts > > drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 1409 ++++++++++--------- > drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 2 +- > 2 files changed, 707 insertions(+), 704 deletions(-) >
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pu...@intel.com> (A Contingent worker at Intel)
