> -----Original Message----- > From: Intel-wired-lan <intel-wired-lan-boun...@osuosl.org> On Behalf Of Karol > Kolacinski > Sent: Wednesday, April 24, 2024 7:00 PM > To: intel-wired-...@lists.osuosl.org > Cc: net...@vger.kernel.org; Kubalewski, Arkadiusz > <arkadiusz.kubalew...@intel.com>; Kolacinski, Karol > <karol.kolacin...@intel.com>; Nguyen, Anthony L <anthony.l.ngu...@intel.com> > Subject: [Intel-wired-lan] [PATCH v10 iwl-next 12/12] ice: Adjust PTP init > for 2x50G E825C devices > > From: Grzegorz Nitka <grzegorz.ni...@intel.com> > > From FW/HW perspective, 2 port topology in E825C devices requires merging of > 2 port mapping internally and breakout mapping externally. > As a consequence, it requires different port numbering from PTP code > perspective. > For that topology, pf_id can not be used to index PTP ports. Even if the 2nd > port is identified as port with pf_id = 1, all PHY operations need to be > performed as it was port 2. Thus, special mapping is needed for the 2nd port. > This change adds detection of 2x50G topology and applies 'custom' > mapping on the 2nd port. > > Signed-off-by: Grzegorz Nitka <grzegorz.ni...@intel.com> > Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalew...@intel.com> > Signed-off-by: Karol Kolacinski <karol.kolacin...@intel.com> > --- > V4 -> V5: - reworded commit mesage > - renamed GLGEN_SWITCH_MODE_CONFIG_SELECT_25X4_ON_SINGLE_QUAD_M to > GLGEN_SWITCH_MODE_CONFIG_25X4_QUAD_M > > .../net/ethernet/intel/ice/ice_hw_autogen.h | 4 ++++ > drivers/net/ethernet/intel/ice/ice_ptp.c | 5 +++++ > drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 22 +++++++++++++++++++ > drivers/net/ethernet/intel/ice/ice_type.h | 9 ++++++++ > 4 files changed, 40 insertions(+) >
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pu...@intel.com> (A Contingent worker at Intel)
