[Intel-wired-lan] [PATCH v2 iwl-next 04/12] ice: Add PHY OFFSET_READY register clearing

[Karol Kolacinski]

Add a possibility to mark all transmitted/received timestamps as invalid
by clearing PHY OFFSET_READY registers.

Reviewed-by: Przemek Kitszel <przemyslaw.kits...@intel.com>
Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalew...@intel.com>
Signed-off-by: Karol Kolacinski <karol.kolacin...@intel.com>
---
 drivers/net/ethernet/intel/ice/ice_ptp.c    | 11 ++++---
 drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 32 +++++++++++++++++++++
 drivers/net/ethernet/intel/ice/ice_ptp_hw.h |  1 +
 3 files changed, 40 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c 
b/drivers/net/ethernet/intel/ice/ice_ptp.c
index 3019988a43c8..7980482bbf56 100644
--- a/drivers/net/ethernet/intel/ice/ice_ptp.c
+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c
@@ -1930,11 +1930,14 @@ ice_ptp_settime64(struct ptp_clock_info *info, const 
struct timespec64 *ts)
        struct ice_hw *hw = &pf->hw;
        int err;
 
-       /* For Vernier mode, we need to recalibrate after new settime
-        * Start with disabling timestamp block
+       /* For Vernier mode on E82X, we need to recalibrate after new settime.
+        * Start with marking timestamps as invalid.
         */
-       if (pf->ptp.port.link_up)
-               ice_ptp_port_phy_stop(&pf->ptp.port);
+       if (hw->ptp.phy_model == ICE_PHY_E82X) {
+               err = ice_ptp_clear_phy_offset_ready_e82x(hw);
+               if (err)
+                       dev_warn(ice_pf_to_dev(pf), "Failed to mark timestamps 
as invalid before settime\n");
+       }
 
        if (!ice_ptp_lock(hw)) {
                err = -EBUSY;
diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c 
b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
index 12f04ad263c5..6967a918ab5e 100644
--- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
@@ -2405,6 +2405,38 @@ int ice_phy_cfg_rx_offset_e82x(struct ice_hw *hw, u8 
port)
        return 0;
 }
 
+/**
+ * ice_ptp_clear_phy_offset_ready_e82x - Clear PHY TX_/RX_OFFSET_READY 
registers
+ * @hw: pointer to the HW struct
+ *
+ * Clear PHY TX_/RX_OFFSET_READY registers, effectively marking all transmitted
+ * and received timestamps as invalid.
+ */
+int ice_ptp_clear_phy_offset_ready_e82x(struct ice_hw *hw)
+{
+       u8 port;
+
+       for (port = 0; port < hw->ptp.num_lports; port++) {
+               int err;
+
+               err = ice_write_phy_reg_e82x(hw, port, P_REG_TX_OR, 0);
+               if (err) {
+                       dev_warn(ice_hw_to_dev(hw),
+                                "Failed to clear PHY TX_OFFSET_READY 
register\n");
+                       return err;
+               }
+
+               err = ice_write_phy_reg_e82x(hw, port, P_REG_RX_OR, 0);
+               if (err) {
+                       dev_warn(ice_hw_to_dev(hw),
+                                "Failed to clear PHY RX_OFFSET_READY 
register\n");
+                       return err;
+               }
+       }
+
+       return 0;
+}
+
 /**
  * ice_read_phy_and_phc_time_e82x - Simultaneously capture PHC and PHY time
  * @hw: pointer to the HW struct
diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h 
b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h
index 5645b20a9f87..5223e17d2806 100644
--- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h
+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h
@@ -208,6 +208,7 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time);
 int ice_ptp_write_incval(struct ice_hw *hw, u64 incval);
 int ice_ptp_write_incval_locked(struct ice_hw *hw, u64 incval);
 int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj);
+int ice_ptp_clear_phy_offset_ready_e82x(struct ice_hw *hw);
 int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp);
 int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx);
 void ice_ptp_reset_ts_memory(struct ice_hw *hw);
-- 
2.43.0