On 10/11/2023 4:04 AM, Karol Kolacinski wrote:
> During reset, TX_TSYN interrupt should be processed as it may process
> timestamps in brief moments before and after reset.
> Timestamping should be enabled on VSIs at the end of reset procedure.
> On ice_get_phy_tx_tstamp_ready error, interrupt should not be rearmed,
> because error only happens on resets.
> > Reviewed-by: Jesse Brandeburg <jesse.brandeb...@intel.com>
> Signed-off-by: Karol Kolacinski <karol.kolacin...@intel.com>
> ---
Reviewed-by: Jacob Keller <jacob.e.kel...@intel.com>
Thanks!
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