>From: Jiri Pirko <j...@resnulli.us> >Sent: Wednesday, October 4, 2023 12:42 PM > >Wed, Oct 04, 2023 at 11:05:44AM CEST, arkadiusz.kubalew...@intel.com wrote: >>Add attributes for providing the user with: >>- measurement of signals phase offset between pin and dpll >>- ability to adjust the phase of pin signal >> >>Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalew...@intel.com> >>--- >> Documentation/netlink/specs/dpll.yaml | 33 ++++++++++++++++++++++++++- >> drivers/dpll/dpll_nl.c | 8 ++++--- >> drivers/dpll/dpll_nl.h | 2 +- >> include/uapi/linux/dpll.h | 8 ++++++- >> 4 files changed, 45 insertions(+), 6 deletions(-) >> >>diff --git a/Documentation/netlink/specs/dpll.yaml >>b/Documentation/netlink/specs/dpll.yaml >>index 8b86b28b47a6..dc057494101f 100644 >>--- a/Documentation/netlink/specs/dpll.yaml >>+++ b/Documentation/netlink/specs/dpll.yaml >>@@ -1,7 +1,7 @@ >> # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3- >Clause) >> >> name: dpll >>- >>+version: 2 > >Could you reply to my comment about this in V1 please?
Thanks for pointing this out, I have missed that thread.. I will fix it as suggested with v3. Thank you! Arkadiusz _______________________________________________ Intel-wired-lan mailing list Intel-wired-lan@osuosl.org https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
