On Tue, Aug 23, 2016 at 04:18:08PM +0200, Maarten Lankhorst wrote:
> Instead of iterating overthe connectors manually, run the last part of
> DDI disabling inside the crt post disable function.
>
> This was meant to be addressed before submitting the other commit,
> but I missed the review comments.
>
> Fixes: fd6bbda9c7a4 ("drm/i915: Pass crtc_state and connector_state to
> encoder functions")
> Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
Yup, I think that's much more tidy.
Reviewed-by: Daniel Vetter <daniel.vet...@ffwll.ch>
> ---
> drivers/gpu/drm/i915/intel_crt.c | 15 ++++++++
> drivers/gpu/drm/i915/intel_ddi.c | 67
> ++++++++++++++++++------------------
> drivers/gpu/drm/i915/intel_display.c | 25 ++------------
> drivers/gpu/drm/i915/intel_drv.h | 8 +++--
> 4 files changed, 57 insertions(+), 58 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_crt.c
> b/drivers/gpu/drm/i915/intel_crt.c
> index 1daf2d9c937e..dfbcf16b41df 100644
> --- a/drivers/gpu/drm/i915/intel_crt.c
> +++ b/drivers/gpu/drm/i915/intel_crt.c
> @@ -215,6 +215,20 @@ static void pch_post_disable_crt(struct intel_encoder
> *encoder,
> intel_disable_crt(encoder, old_crtc_state, old_conn_state);
> }
>
> +static void hsw_post_disable_crt(struct intel_encoder *encoder,
> + struct intel_crtc_state *old_crtc_state,
> + struct drm_connector_state *old_conn_state)
> +{
> + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +
> + pch_post_disable_crt(encoder, old_crtc_state, old_conn_state);
> +
> + lpt_disable_pch_transcoder(dev_priv);
> + lpt_disable_iclkip(dev_priv);
> +
> + intel_ddi_fdi_post_disable(encoder, old_crtc_state, old_conn_state);
> +}
> +
> static void intel_enable_crt(struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config,
> struct drm_connector_state *conn_state)
> @@ -905,6 +919,7 @@ void intel_crt_init(struct drm_device *dev)
> if (HAS_DDI(dev)) {
> crt->base.get_config = hsw_crt_get_config;
> crt->base.get_hw_state = intel_ddi_get_hw_state;
> + crt->base.post_disable = hsw_post_disable_crt;
> } else {
> crt->base.get_config = intel_crt_get_config;
> crt->base.get_hw_state = intel_crt_get_hw_state;
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index 309ba7bc19ad..bbd81c6bdd69 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -1714,6 +1714,40 @@ static void intel_ddi_post_disable(struct
> intel_encoder *intel_encoder,
> }
> }
>
> +void intel_ddi_fdi_post_disable(struct intel_encoder *intel_encoder,
> + struct intel_crtc_state *old_crtc_state,
> + struct drm_connector_state *old_conn_state)
> +{
> + struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
> + uint32_t val;
> +
> + /*
> + * Bspec lists this as both step 13 (before DDI_BUF_CTL disable)
> + * and step 18 (after clearing PORT_CLK_SEL). Based on a BUN,
> + * step 13 is the correct place for it. Step 18 is where it was
> + * originally before the BUN.
> + */
> + val = I915_READ(FDI_RX_CTL(PIPE_A));
> + val &= ~FDI_RX_ENABLE;
> + I915_WRITE(FDI_RX_CTL(PIPE_A), val);
> +
> + intel_ddi_post_disable(intel_encoder, old_crtc_state, old_conn_state);
> +
> + val = I915_READ(FDI_RX_MISC(PIPE_A));
> + val &= ~(FDI_RX_PWRDN_LANE1_MASK | FDI_RX_PWRDN_LANE0_MASK);
> + val |= FDI_RX_PWRDN_LANE1_VAL(2) | FDI_RX_PWRDN_LANE0_VAL(2);
> + I915_WRITE(FDI_RX_MISC(PIPE_A), val);
> +
> + val = I915_READ(FDI_RX_CTL(PIPE_A));
> + val &= ~FDI_PCDCLK;
> + I915_WRITE(FDI_RX_CTL(PIPE_A), val);
> +
> + val = I915_READ(FDI_RX_CTL(PIPE_A));
> + val &= ~FDI_RX_PLL_ENABLE;
> + I915_WRITE(FDI_RX_CTL(PIPE_A), val);
> +}
> +
> +
> static void intel_enable_ddi(struct intel_encoder *intel_encoder,
> struct intel_crtc_state *pipe_config,
> struct drm_connector_state *conn_state)
> @@ -2153,39 +2187,6 @@ void intel_ddi_prepare_link_retrain(struct intel_dp
> *intel_dp)
> udelay(600);
> }
>
> -void intel_ddi_fdi_disable(struct intel_encoder *intel_encoder,
> - struct intel_crtc_state *old_crtc_state,
> - struct drm_connector_state *old_conn_state)
> -{
> - struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
> - uint32_t val;
> -
> - /*
> - * Bspec lists this as both step 13 (before DDI_BUF_CTL disable)
> - * and step 18 (after clearing PORT_CLK_SEL). Based on a BUN,
> - * step 13 is the correct place for it. Step 18 is where it was
> - * originally before the BUN.
> - */
> - val = I915_READ(FDI_RX_CTL(PIPE_A));
> - val &= ~FDI_RX_ENABLE;
> - I915_WRITE(FDI_RX_CTL(PIPE_A), val);
> -
> - intel_ddi_post_disable(intel_encoder, old_crtc_state, old_conn_state);
> -
> - val = I915_READ(FDI_RX_MISC(PIPE_A));
> - val &= ~(FDI_RX_PWRDN_LANE1_MASK | FDI_RX_PWRDN_LANE0_MASK);
> - val |= FDI_RX_PWRDN_LANE1_VAL(2) | FDI_RX_PWRDN_LANE0_VAL(2);
> - I915_WRITE(FDI_RX_MISC(PIPE_A), val);
> -
> - val = I915_READ(FDI_RX_CTL(PIPE_A));
> - val &= ~FDI_PCDCLK;
> - I915_WRITE(FDI_RX_CTL(PIPE_A), val);
> -
> - val = I915_READ(FDI_RX_CTL(PIPE_A));
> - val &= ~FDI_RX_PLL_ENABLE;
> - I915_WRITE(FDI_RX_CTL(PIPE_A), val);
> -}
> -
> void intel_ddi_get_config(struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config)
> {
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 2ae080f947e8..8bd9cdb00869 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1907,7 +1907,7 @@ static void ironlake_disable_pch_transcoder(struct
> drm_i915_private *dev_priv,
> }
> }
>
> -static void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv)
> +void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv)
> {
> u32 val;
>
> @@ -4292,7 +4292,7 @@ static int intel_crtc_wait_for_pending_flips(struct
> drm_crtc *crtc)
> return 0;
> }
>
> -static void lpt_disable_iclkip(struct drm_i915_private *dev_priv)
> +void lpt_disable_iclkip(struct drm_i915_private *dev_priv)
> {
> u32 temp;
>
> @@ -5606,28 +5606,9 @@ static void haswell_crtc_disable(struct
> intel_crtc_state *old_crtc_state,
>
> intel_encoders_post_disable(crtc, old_crtc_state, old_state);
>
> - if (intel_crtc->config->has_pch_encoder) {
> - struct drm_connector_state *old_conn_state;
> - struct drm_connector *conn;
> - int i;
> -
> - lpt_disable_pch_transcoder(dev_priv);
> - lpt_disable_iclkip(dev_priv);
> -
> - for_each_connector_in_state(old_state, conn, old_conn_state, i)
> - if (old_conn_state->crtc == crtc) {
> - struct intel_encoder *encoder =
> -
> to_intel_encoder(old_conn_state->best_encoder);
> -
> - intel_ddi_fdi_disable(encoder,
> - old_crtc_state,
> - old_conn_state);
> - break;
> - }
> -
> + if (old_crtc_state->has_pch_encoder)
> intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
> true);
> - }
> }
>
> static void i9xx_pfit_enable(struct intel_crtc *crtc)
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 690fa463a6bc..f241a47b6e3a 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1137,6 +1137,9 @@ void intel_crt_reset(struct drm_encoder *encoder);
> /* intel_ddi.c */
> void intel_ddi_clk_select(struct intel_encoder *encoder,
> const struct intel_crtc_state *pipe_config);
> +void intel_ddi_fdi_post_disable(struct intel_encoder *intel_encoder,
> + struct intel_crtc_state *old_crtc_state,
> + struct drm_connector_state *old_conn_state);
> void intel_prepare_dp_ddi_buffers(struct intel_encoder *encoder);
> void hsw_fdi_link_train(struct drm_crtc *crtc);
> void intel_ddi_init(struct drm_device *dev, enum port port);
> @@ -1152,9 +1155,6 @@ bool intel_ddi_pll_select(struct intel_crtc *crtc,
> void intel_ddi_set_pipe_settings(struct drm_crtc *crtc);
> void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp);
> bool intel_ddi_connector_get_hw_state(struct intel_connector
> *intel_connector);
> -void intel_ddi_fdi_disable(struct intel_encoder *,
> - struct intel_crtc_state *,
> - struct drm_connector_state *);
> void intel_ddi_get_config(struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config);
> struct intel_encoder *
> @@ -1185,6 +1185,8 @@ void skl_set_preferred_cdclk_vco(struct
> drm_i915_private *dev_priv, int vco);
> void intel_update_rawclk(struct drm_i915_private *dev_priv);
> int vlv_get_cck_clock(struct drm_i915_private *dev_priv,
> const char *name, u32 reg, int ref_freq);
> +void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv);
> +void lpt_disable_iclkip(struct drm_i915_private *dev_priv);
> extern const struct drm_plane_funcs intel_plane_funcs;
> void intel_init_display_hooks(struct drm_i915_private *dev_priv);
> unsigned int intel_fb_xy_to_linear(int x, int y,
> --
> 2.7.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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