On Tue, 2016-07-12 at 15:50 +0200, Daniel Vetter wrote:
> On Wed, Jul 06, 2016 at 02:04:52PM +0300, Mika Kahola wrote:
> > Filter out a mode that exceeds the max pixel rate setting
> > for DP to VGA dongle. This is defined in DPCD register 0x81
> > if detailed cap info i.e. info field is 4 bytes long and
> > it is available for DP downstream port.
> >
> > The register defines the pixel rate divided by 8 in MP/s.
> >
> > v2: DPCD read outs and computation moved to drm (Ville, Daniel)
> > v3: Sink pixel rate computation moved to drm_dp_max_sink_dotclock()
> > function (Daniel)
> > v4: Use of drm_dp_helper.c routines to compute max pixel clock (Ville)
> > v5: Use of intel_dp->downstream_ports to read out port capabilities.
> > Code restructuring (Ville)
> >
> > Signed-off-by: Mika Kahola <mika.kah...@intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_dp.c | 26 ++++++++++++++++++++++++++
> > 1 file changed, 26 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > b/drivers/gpu/drm/i915/intel_dp.c
> > index ffa43ec..76a654e 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -190,6 +190,20 @@ intel_dp_max_data_rate(int max_link_clock, int
> > max_lanes)
> > return (max_link_clock * max_lanes * 8) / 10;
> > }
> >
> > +static int
> > +intel_dp_downstream_max_clock(struct intel_dp *intel_dp, int clock)
> > +{
> > + int dp_ds_clk;
> > +
> > + dp_ds_clk = drm_dp_downstream_max_clock(intel_dp->dpcd,
> > + intel_dp->downstream_ports);
> > +
> > + if (dp_ds_clk == 0)
> > + return clock;
> > +
> > + return min(clock, dp_ds_clk);
> > +}
> > +
> > static enum drm_mode_status
> > intel_dp_mode_valid(struct drm_connector *connector,
> > struct drm_display_mode *mode)
> > @@ -201,6 +215,18 @@ intel_dp_mode_valid(struct drm_connector *connector,
> > int max_rate, mode_rate, max_lanes, max_link_clock;
> > int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
> >
> > + bool is_branch_device = intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &
> > + DP_DWN_STRM_PORT_PRESENT;
> > + int type;
> > +
> > + if (is_branch_device) {
>
> Shouldn't we move this check into the drm dp helper? It can always return
> 0 for "no downstream port restrictions".
I guess we can do that. It probably looks cleaner that way.
Cheers,
Mika
>
> > + type = intel_dp->downstream_ports[0] & DP_DS_PORT_TYPE_MASK;
> > +
> > + if (type == DP_DS_PORT_TYPE_VGA)
> Same here.
> -Daniel
>
> > + max_dotclk = intel_dp_downstream_max_clock(intel_dp,
> > + max_dotclk);
> > + }
> > +
> > if (is_edp(intel_dp) && fixed_mode) {
> > if (mode->hdisplay > fixed_mode->hdisplay)
> > return MODE_PANEL;
> > --
> > 1.9.1
> >
>
--
Mika Kahola - Intel OTC
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