[Intel-gfx] [PATCH 09/13] drm/i915: Compact Gen8 semaphore initialization

[Tvrtko Ursulin]

From: Tvrtko Ursulin <tvrtko.ursu...@intel.com>

Replace the macro initializer with a programatic loop which
results in smaller code and hopefully just as clear.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 16 +++++++++++++++-
 drivers/gpu/drm/i915/intel_ringbuffer.h | 12 ------------
 2 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c 
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 691f82199d3c..088d75397d1b 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2876,13 +2876,27 @@ static int gen6_ring_flush(struct drm_i915_gem_request 
*req,
 static void intel_ring_init_semaphores(struct drm_i915_private *dev_priv,
                                       struct intel_engine_cs *engine)
 {
+       int i;
+
        if (!i915_semaphore_is_enabled(dev_priv))
                return;
 
        if (INTEL_GEN(dev_priv) >= 8) {
                engine->semaphore.sync_to = gen8_ring_sync;
                engine->semaphore.signal = gen8_xcs_signal;
-               GEN8_RING_SEMAPHORE_INIT(engine);
+
+               if (dev_priv->semaphore_obj) {
+                       u64 offset = 
i915_gem_obj_ggtt_offset(dev_priv->semaphore_obj);
+
+                       for (i = 0; i < I915_NUM_ENGINES; i++) {
+                               u64 ring_offset = MI_SEMAPHORE_SYNC_INVALID;
+
+                               if (i != engine->id)
+                                       ring_offset = offset + 
GEN8_SEMAPHORE_OFFSET(engine->id, i);
+
+                               engine->semaphore.signal_ggtt[i] = ring_offset;
+                       }
+               }
        } else if (INTEL_GEN(dev_priv) >= 6) {
                engine->semaphore.sync_to = gen6_ring_sync;
                engine->semaphore.signal = gen6_signal;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h 
b/drivers/gpu/drm/i915/intel_ringbuffer.h
index b33c876fed20..113d5230a6de 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -62,18 +62,6 @@ struct  intel_hw_status_page {
        (i915_gem_obj_ggtt_offset(dev_priv->semaphore_obj) + \
         GEN8_SEMAPHORE_OFFSET(from, (__ring)->id))
 
-#define GEN8_RING_SEMAPHORE_INIT(e) do { \
-       if (!dev_priv->semaphore_obj) { \
-               break; \
-       } \
-       (e)->semaphore.signal_ggtt[RCS] = GEN8_SIGNAL_OFFSET((e), RCS); \
-       (e)->semaphore.signal_ggtt[VCS] = GEN8_SIGNAL_OFFSET((e), VCS); \
-       (e)->semaphore.signal_ggtt[BCS] = GEN8_SIGNAL_OFFSET((e), BCS); \
-       (e)->semaphore.signal_ggtt[VECS] = GEN8_SIGNAL_OFFSET((e), VECS); \
-       (e)->semaphore.signal_ggtt[VCS2] = GEN8_SIGNAL_OFFSET((e), VCS2); \
-       (e)->semaphore.signal_ggtt[(e)->id] = MI_SEMAPHORE_SYNC_INVALID; \
-       } while(0)
-
 enum intel_ring_hangcheck_action {
        HANGCHECK_IDLE = 0,
        HANGCHECK_WAIT,
-- 
1.9.1

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