From: Ville Syrjälä <ville.syrj...@linux.intel.com> Try to define the display power well power domains properly for HSW/BDW/VLV/CHV, and make the always-on well part of every domain on every platform.
Ville Syrjälä (3): drm/i915: Set .domains=POWER_DOMAIN_MASK for the always-on well drm/i915: Define VLV/CHV display power well domains properly drm/i915: Define HSW/BDW display power domains the right way up drivers/gpu/drm/i915/intel_runtime_pm.c | 109 +++++++++++++++++++++----------- 1 file changed, 72 insertions(+), 37 deletions(-) -- 2.7.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
