On Fri, 2016-04-01 at 10:44 +0300, Jani Nikula wrote:
> Make it easier to see which ports are configured for each phy. No
> functional changes.
>
> Signed-off-by: Jani Nikula <jani.nik...@intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselv...@gmail.com>
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 10 +++++++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index 1e083853c70d..7049086b1b27 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -1726,7 +1726,7 @@ static void broxton_phy_init(struct drm_i915_private
> *dev_priv,
> enum dpio_phy phy)
> {
> enum port port;
> - uint32_t val;
> + u32 ports, val;
>
> val = I915_READ(BXT_P_CR_GT_DISP_PWRON);
> val |= GT_DISPLAY_POWER_ON(phy);
> @@ -1736,8 +1736,12 @@ static void broxton_phy_init(struct drm_i915_private
> *dev_priv,
> if (wait_for(I915_READ(BXT_PORT_CL1CM_DW0(phy)) & PHY_POWER_GOOD,
> 10))
> DRM_ERROR("timeout during PHY%d power on\n", phy);
>
> - for (port = (phy == DPIO_PHY0 ? PORT_B : PORT_A);
> - port <= (phy == DPIO_PHY0 ? PORT_C : PORT_A); port++) {
> + if (phy == DPIO_PHY0)
> + ports = BIT(PORT_B) | BIT(PORT_C);
> + else
> + ports = BIT(PORT_A);
> +
> + for_each_port_masked(port, ports) {
> int lane;
>
> for (lane = 0; lane < 4; lane++) {
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